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msp 3405d, msp 3415d multistandard edition oct. 14, 1999 6251-475-2pd prelimina r y d a t a sheet mic r onas micronas sound processors
msp 34x5d preliminary data sheet 2 micronas contents page section title 5 1. introduction 5 1.1. common features of msp 34x5d 5 1.2. specific msp 3415d features 5 1.3. unsupported msp 34x0d functions 5 1.4. msp 34x0d inputs and outputs not included in the msp 34x5d 6 2. basic features of the msp 34x5d 6 2.1. demodulator and nicam decoder section 6 2.2. dsp-section (audio baseband processing) 6 2.3. analog section 7 3. application fields of the msp 34x5d 7 3.1. nicam plus fm/am-mono 7 3.2. german 2-carrier system (dual fm system) 10 4. architecture of the msp 34x5d 10 4.1. demodulator and nicam decoder section 10 4.1.1. analog sound if ? input section 11 4.1.2. quadrature mixers 11 4.1.3. low-pass filtering block for mixed sound if signals 12 4.1.4. phase and am discrimination 12 4.1.5. differentiators 12 4.1.6. low-pass filter block for demodulated signals 12 4.1.7. high deviation fm mode 12 4.1.8. fm-carrier-mute function in the dual carrier fm mode 12 4.1.9. dqpsk-decoder (msp 3415d only) 12 4.1.10. nicam-decoder (msp 3415d only) 13 4.2. analog section 13 4.2.1. scart switching facilities 13 4.2.2. stand-by mode 13 4.3. dsp-section (audio baseband processing) 13 4.3.1. dual carrier fm stereo/bilingual detection 14 4.4. audio pll and crystal specifications 14 4.5. digital control output pins 15 4.6. i 2 s bus interface 16 5. i 2 c bus interface: device and subaddresses 17 5.1. protocol description 18 5.2. proposal for msp 34x5d i 2 c telegrams 18 5.2.1. symbols 18 5.2.2. write telegrams 18 5.2.3. read telegrams 18 5.2.4. examples 19 5.3. start-up sequence: power-up and i 2 c-controlling
preliminary data sheet msp 34x5d 3 micronas contents, continued page section title 20 6. programming the demodulator section 20 6.1. short-programming and general programming of the demodulator part 21 6.2. demodulator write registers: table and addresses 21 6.3. demodulator read registers: table and addresses 22 6.4. demodulator write registers for short-programming: functions and values 22 6.4.1. demodulator short-programming 23 6.4.2. auto_fm/am: automatic switching between nicam and fm/am-mono (msp 3415d only) 24 6.5. demodulator write registers for the general programming mode: functions and values 24 6.5.1. register ? ad_cv ? 26 6.5.2. register ? mode_reg ? 27 6.5.3. fir-parameter 29 6.5.4. dco-registers 29 6.6. demodulator read registers: functions and values 30 6.6.1. autodetect of terrestrial tv-audio standards 31 6.6.2. c_ad_bits (msp 3415d only) 31 6.6.3. add_bits [10...3] (msp 3415d only) 31 6.6.4. cib_bits (msp 3415d only) 31 6.6.5. error_rate (msp 3415d only) 32 6.6.6. conc_ct (for compatibility with msp 3410b) 32 6.6.7. fawct_ist (for compatibility with msp 3410b) 32 6.6.8. pll_caps 32 6.6.9. agc_gain 32 6.7. sequences to transmit parameters and to start processing 34 6.8. software proposals for multistandard tv-sets 34 6.8.1. multistandard including system b/g or i (nicam/fm-mono only) or secam l (nicam/am-mono only) 34 6.8.2. multistandard including system b/g with nicam/fm-mono and german dual fm 34 6.8.3. satellite mode 34 6.8.4. automatic search function for fm-carrier detection 36 7. programming the dsp section (audio baseband processing) 36 7.1. dsp write registers: table and addresses 37 7.2. dsp read registers: table and addresses 38 7.3. dsp write registers: functions and values 38 7.3.1. volume loudspeaker channel 39 7.3.2. balance loudspeaker channel 39 7.3.3. bass loudspeaker channel 40 7.3.4. treble loudspeaker channel 40 7.3.5. loudness loudspeaker channel 40 7.3.6. spatial effects loudspeaker channel 41 7.3.7. volume scart1 41 7.3.8. channel source modes 41 7.3.9. channel matrix modes 42 7.3.10. scart prescale 42 7.3.11. fm/am prescale 43 7.3.12. fm matrix modes 43 7.3.13. fm fixed deemphasis 43 7.3.14. fm adaptive deemphasis
msp 34x5d preliminary data sheet 4 micronas contents, continued page section title 43 7.3.15. nicam prescale (msp 3415d only) 43 7.3.16. nicam deemphasis (msp 3415d only) 43 7.3.17. i 2 s1 and i 2 s2 prescale 43 7.3.18. acb register 44 7.3.19. beeper 44 7.3.20. identification mode 44 7.3.21. fm dc notch 44 7.3.22. automatic volume correction (avc) 45 7.4. exclusions for the audio baseband features 45 7.5. dsp read registers: functions and values 45 7.5.1. stereo detection register 45 7.5.2. quasi-peak detector 46 7.5.3. dc level register 46 7.5.4. msp hardware version code 46 7.5.5. msp major revision code 46 7.5.6. msp product code 46 7.5.7. msp rom version code 47 8. specifications 47 8.1. outline dimensions 49 8.2. pin connections and short descriptions 52 8.3. pin configurations 55 8.4. pin circuits 57 8.5. electrical characteristics 57 8.5.1. absolute maximum ratings 58 8.5.2. recommended operating conditions 62 8.5.3. characteristics 66 9. application circuit 67 10. appendix a: msp 34x5d version history 68 11. data sheet history
msp 34x5d preliminary data sheet 5 micronas multistandard sound processor release notes: the hardware description in this document is valid for the msp 34x5d version a2 and following versions. revision bars indicate signifi- cant changes to the previous edition. 1. introduction the msp 34x5d is designed as a single-chip multistan- dard sound processor for applications in analog and digital tv sets, video recorders, and pc-cards. as deriv- ative versions of the msp 34x0d, the msp 34x5d com- bines all demodulator features of the msp 34x0d with less i/o and reduced audio baseband processing. the ic is produced in submicron cmos technology, combined with high-performance digital signal proces- sing. the msp 34x5d is available in the following packages: plcc68, psdip64, psdip52, pqfp80, and pmqfp44. note: the msp 34x5d version has reduced control reg- isters and less functional pins. the remaining registers are software compatible to the msp 3410d. the pinning is compatible to the msp 3410d. 1.1. common features of msp 34x5d ? dolby pro logic together with dpl 351xa ? analog sound if input ? no external filters required ? stereo baseband input via integrated a/d converters ? two pairs of d/a converters ? two carrier fm ? i 2 s interface for version b3 and later versions ? avc: automatic volume correction ? bass, treble, volume, loudness, and spatial effects processing ? full scart in/out matrix without restrictions ? improved fm-identification (as in mspc) ? demodulator short programming ? autodetection for terrestrial tv-sound standards ? improved carrier mute algorithm (as in mspd) ? improved am-demodulation (as in mspd) ? digital control output pins d_ctr_out0/1 ? reduction of necessary controlling ? less external components 1.2. specific msp 3415d features ? all nicam standards ? precise bit-error rate indication ? automatic switching from nicam to fm/am or vice versa ? improved nicam synchronization algorithm 1.3. unsupported msp 34x0d functions ? equalizer 1.4. msp 34x0d inputs and outputs not included in the msp 34x5d ? 2nd if input ? 3rd and 4th scart input ? 2nd scart output ? 2nd scart da ? headphone output ? subwoofer output ? adr interface fig. 1?1: main i/o signals of the msp 34x5d sound if 1 mono in scart1 in 2 scart2 in 2 msp 34x5d i 2 c 2 scart out loudspeaker out 2 2 i 2 s 5
msp 34x5d preliminary data sheet 6 micronas 2. basic features of the msp 34x5d 2.1. demodulator and nicam decoder section the msp 3415d is designed to simultaneously perform digital demodulation and decoding of nicam-coded tv stereo sound, as well as demodulation of fm or am- mono tv sound. alternatively, two carrier fm systems according to the german terrestrial specs can be pro- cessed with the msp 34x5d. the msp 34x5d facilitates profitable multistandard ca- pability, offering the following advantages: ? automatic gain control (agc) for analog input: input range: 0.10 ? 3 vpp ? integrated a/d converter for sound if input ? all demodulation and filtering is performed on chip and is individually programmable ? easy realization of all digital nicam standards (b/g, i, l and d/k, not for msp 3405d) ? fm-demodulation of all terrestrial standards (including identification decoding) ? no external filter hardware is required ? only one crystal clock (18.432 mhz) is necessary ? high deviation fm-mono mode (max. deviation: approx. ? two digital inputs and one digital output via i 2 s bus for external signal processors like the dpl 351x. ? flexible selection of audio sources to be processed ? performance of terrestrial deemphasis systems (fm, nicam) ? digitally performed fm-identification decoding and dematrixing ? digital baseband processing: volume, bass, treble, loudness, and spatial effects ? simple controlling of volume, bass, treble, loudness, and spatial effects 2.3. analog section ? two selectable analog pairs of audio baseband inputs (= two scart inputs) input level: ? ? one selectable analog mono input (i.e. am sound): input level: ? ? two high-quality a/d converters, s/n-ratio: ? 20 hz to 20 khz bandwidth for scart-to-scart-copy facilities ? loudspeaker: one pair of four-fold oversampled d/a-converters output level per channel: max. 1.4 vrms output resistance: max. 5 k ? ? one pair of four-fold oversampled d/a converters supplying a pair of scart-outputs. output level per channel: max. 2 v rms, output resistance: max. 0.5 k ?
msp 34x5d preliminary data sheet 7 micronas 3. application fields of the msp 34x5d in the following sections, a brief overview about the two main tv sound standards, nicam 728 and german fm- stereo, demonstrates the complex requirements of a multistandard audio ic. 3.1. nicam plus fm/am-mono according to the british, scandinavian, spanish, and french tv-standards, high-quality stereo sound is transmitted digitally. the systems allow two high-quality digital sound channels to be added to the already exist- ing fm/am-channel. the sound coding follows the for- mat of the so-called near instantaneous companding system (nicam 728). transmission is performed using differential quadrature phase shift keying (dqpsk). table 3 ? 2 gives some specifications of the sound coding (nicam); table 3 ? 3 offers an overview of the modula- tion parameters. in the case of nicam/fm (am) mode, there are three dif- ferent audio channels available: nicam a, nicam b, and fm/am-mono. nicam a and b may belong either to a stereo or to a dual language transmission. information about operation mode and about the quality of the ni- cam signal can be read by the ccu via the control bus. in the case of low quality (high bit error rate), the ccu may decide to switch to the analog fm/am-mono sound. alternatively, an automatic nicam-fm/am switching may be applied. 3.2. german 2-carrier system (dual fm system) since september 1981, stereo and dual sound pro- grams have been transmitted in germany using the 2-carrier system. sound transmission consists of the al- ready existing first sound carrier and a second sound carrier additionally containing an identification signal. more details of this standard are given in tables 3 ? 1 and 3 ? 4. for d/k and m-korea, very similar systems are used. table 3 ? 1: tv standards tv-system position of sound carrier [mhz] sound modulation color system country b/g 5.5/5.7421875 fm-stereo pal germany b/g 5.5/5.85 fm-mono/nicam pal scandinavia,spain l 6.5/5.85 am-mono/nicam secam-l france i 6.0/6.552 fm-mono/nicam pal uk d/k 6.5 /6.2578125 d/k1 6.5/6.7421875 d/k2 6.5/5.85 d/k-nicam fm-stereo fm-mono/nicam secam-east ussr hungary m m-korea 4.5 4.5/4.724212 fm-mono fm-stereo ntsc usa korea satellite satellite 6.5 7.02/7.2 fm-mono fm-stereo pal pal europe (astra) europe (astra)
msp 34x5d preliminary data sheet 8 micronas table 3 ? 2: summary of nicam 728 sound coding characteristics characteristics values audio sampling frequency 32 khz number of channels 2 initial resolution 14 bit/sample companding characteristics near instantaneous, with compression to 10 bits/sample in 32-sam- ples (1 ms) blocks coding for compressed samples 2 ? s complement preemphasis ccitt recommendation j.17 (6.5 db attenuation at 800 hz) audio overload level +12 dbm measured at the unity gain frequency of the preemphasis network (2 khz) table 3 ? 3: summary of nicam 728 sound modulation parameters specification i b/g l d/k carrier frequency of digital sound 6.552 mhz 5.85 mhz 5.85 mhz 5.85 mhz transmission rate 728 kbit/s type of modulation differentially encoded quadrature phase shift keying (dqpsk) spectrum shaping roll off factor by means of roll-off filters r o ll -o ff f ac t or 1.0 0.4 0.4 0.4 carrier frequency of analog sound component 6.0 mhz fm mono 5.5 mhz fm mono 6.5 mhz am mono 6.5 mhz fm mono ana l og soun d componen t fm mono fm mono terres- trial cable fm mono power ratio between vision carrier and analog sound carrier 10 db 13 db 10 db 16 db 13 db power ratio between analog and modulated 10 db 7 db 17 db 11 db hungary poland analog and modulated digital sound carrier 12 db 7 db
msp 34x5d preliminary data sheet 9 micronas table 3 ? 4: key parameters for b/g, d/k, and m 2-carrier sound system sound carriers carrier fm1 carrier fm2 b/g d/k m b/g d/k m vision/sound power difference 13 db 20 db sound bandwidth 40 hz to 15 khz pre-emphasis 50 ? r)/2 dual sound transmission language a language b identification of transmission mode on carrier fm2 pilot carrier frequency in khz 54.6875 55.0699 type of modulation am modulation depth 50% modulation frequency mono: unmodulated stereo: 117.5 hz dual: 274.1 hz 149.9 hz 276.0 hz tuner sound if mixer vision demo- dulator composite video scart1 saw filter sound if filter msp 34x5d 33 34 39 mhz 5 9 mhz loudspeaker 2 scart inputs scart output scart1 2 scart2 2 fig. 3 ? 1: typical msp 34x5d application according to the mixing characteristics of the sound-if mixer, the sound-if filter may be omitted. mono 1 dolby pro logic processor dpla i 2 s1 digital signal source i 2 s2
msp 34x5d preliminary data sheet 10 micronas 4. architecture of the msp 34x5d fig. 4 ? 1 shows a simplified block diagram of the ic. its architecture is split into three main functional blocks: 1. demodulator and nicam decoder section 2. digital signal processing (dsp) section performing audio baseband processing 3. analog section containing two a/d-converters, four d/a-converters, and scart switching facilities. 4.1. demodulator and nicam decoder section 4.1.1. analog sound if ? input section the input pins ana_in1+ and ana_in ? offer the possi- bility to connect sound if (sif) sources to the msp 34x5d. the analog-to-digital conversion of the prese- lected sound if signal is done by an a/d-converter, whose output can be used to control an analog automat- ic gain circuit (agc), providing an optimal level for a wide range of input levels. it is possible to switch be- tween automatic gain control and a fixed (setable) input gain. in the optimal case, the input range of the a/d con- verter is completely covered by the sound if source. some combinations of saw filters and sound if mixer ics, however, show large picture components on their outputs. in this case, filtering is recommended. it was found, that the high pass filters formed by the coupling capacitors at pin ana_in1+ (as shown in the application diagram) are sufficient in most cases. dsp sound if loudspeaker dacm_l sc1_out_l mono scart1 scart2 d/a d/a d/a d/a scart fm1/am fm2 nicam a nicam b scart l scart r scart1_l scart1_r loud- speaker r loud- speaker l ident a/d a/d dacm_r sc1_out_r ana_in1+ mono_in sc1_in_l sc1_in_r sc2_in_l sc2_in_r fig. 4 ? 1: architecture of the msp 34x5d scart switching facilities demodulator and nicam decoder xtal_in audio pll xtal_out i 2 s1/2l/r i 2 s_l/r i 2 s_cl i 2 s_da_in1 i 2 s_da_out i 2 s_ws i 2 s interface i 2 s_da_in2 d_ctr_out0/1 2
msp 34x5d preliminary data sheet 11 micronas 4.1.2. quadrature mixers the digital input coming from the integrated a/d conver- ter may contain audio information at a frequency range of theoretically 0 to 9 mhz corresponding to the selected standards. by means of two programmable quadrature mixers, two different audio sources; for example, ni- cam and fm-mono, may be shifted into baseband posi- tion. in the following, the two main channels are provided to process either: ? nicam (msp-ch1) and fm/am mono (msp-ch2) si- multaneously or, alternatively, ? fm2 (msp-ch1) and fm1 (msp-ch2). nicam is not possible with msp 3405d. two programmable registers, to be divided up into low and high part, determine frequency of the oscillator, which corresponds to the frequency of the desired audio carrier. in section 6.2., format and values of the registers are listed. 4.1.3. low-pass filtering block for mixed sound if signals data shaping and/or fm bandwidth limitation is per- formed by a linear phase finite impulse response (fir- filter). just like the oscillators ? frequency, the filter coeffi- cients are programmable and are written into the ic by the ccu via the control bus. thus, for example, different nicam versions can easily be implemented. two not necessarily different sets of coefficients are required, one for msp-ch1 (nicam or fm2) and one for msp- ch2 (fm1 = fm-mono). in section 6.5.3., several coeffi- cient sets are proposed. fig. 4 ? 2: demodulator architecture of msp 34x5d agc ad mixer lowpass dqpsk decoder differen- tiator lowpass mute carrier detect nicam decoder mixer lowpass differen- tiator lowpass mute carrier detect nicama nicamb fm2 fm1/am oscillator dco1 fir1 mode_reg[6] ad_cv[7:1] dco2 fir2 mode_reg[8] ad_cv[9] oscillator phase phase amplitude amplitude pins internal signal lines (see fig. 4?5) demodulator write registers msp sound if channel 1 (msp-ch1: fm2, nicam) msp sound if channel 2 (msp-ch2: fm1, am) frame nicama dco2 mixer ident vreftop ana_in- phase and am dis- crimination phase and am dis- crimination ana_in1+ msp 3415d only
msp 34x5d preliminary data sheet 12 micronas 4.1.4. phase and am discrimination the filtered sound if signals are demodulated by means of the phase and amplitude discriminator block. on the output, the phase and amplitude is available for further processing. am signals are derived from the amplitude information, whereas the phase information serves for fm and nicam (dqpsk) demodulation. 4.1.5. differentiators fm demodulation is completed by differentiating the phase information output. 4.1.6. low-pass filter block for demodulated signals the demodulated fm and am signals are further low- pass filtered and decimated to a final sampling frequen- cy of 32 khz. the usable bandwidth of the final base- band signals is about 15 khz. 4.1.7. high deviation fm mode by means of mode_reg [9], the maximum fm-devi- ation can be extended to approximately
msp 34x5d preliminary data sheet 13 micronas 4.2. analog section 4.2.1. scart switching facilities the analog input and output sections include full matrix switching facilities, which are shown in fig. 4 ? 3. the switches are controlled by the acb bits defined in the audio processing interface (see section 7. program- ming the dsp section). fig. 4 ? 3: scart switching facilities (see 7.3.18.) switching positions show the default configuration af- ter power-on reset. note: scart_out is undefined after reset! s2 acb [6,11,10] scart_in sc1_in_l/r sc2_in_l/r from audio baseband processing (dsp_out) scart_out sc1_out_l/r s1 acb [5,9,8] to audio baseband processing (dsp_in) a d d a mono_in scart1_l/r scartl/r pins intern. signal lines 4.2.2. stand-by mode if the msp 34x5d is switched off by first pulling stand- byq low, and then disconnecting the 5 v, but keeping the 8 v power supply ( ? stand-by ? -mode ), the switches s1 and s2 (see fig. 4 ? 3) maintain their position and function. this facilitates the copying from selected scart-inputs to scart-outputs in the tv-set ? s stand- by mode. in case of power-on start or starting from stand-by, the ic switches automatically to the default configuration, shown in fig. 4 ? 3. this action takes place after the first i 2 c transmission into the dsp part. by transmitting the acb register first, the individual default setting mode of the tv set can be defined. 4.3. dsp-section (audio baseband processing) all audio baseband functions are performed by digital signal processing (dsp). the dsp functions are grouped into three processing parts: input preproces- sing, channel source selection, and channel postpro- cessing (see fig. 4 ? 5 and section 7.). the input preprocessing is intended to prepare the vari- ous signals of all input sources in order to form a stan- dardized signal at the input to the channel selector. the signals can be adjusted in volume, are processed with the appropriate deemphasis, and are dematrixed if nec- essary. having prepared the signals that way, the channel selec- tor makes it possible to distribute all possible source sig- nals to the desired output channels. all input and output signals can be processed simulta- neously with the exception that fm2 cannot be pro- cessed at the same time as nicam. fm-identification and adaptive deemphasis are not possible simulta- neously (if adaptive deemphasis is active, the id-level in stereo detection register is not valid). 4.3.1. dual carrier fm stereo/bilingual detection for the terrestrial dual fm carrier systems, audio in- formation can be transmitted in three modes: mono, ste- reo, or bilingual. to obtain information about the current audio operation mode, the msp 34x5d detects the so- called identification signal. information is supplied via the stereo detection register to an external ccu. ident am demodu- lation stereo detection register stereo detection filter bilingual detection filter level detect level detect ? fig. 4 ? 4: stereo/bilingual detection
msp 34x5d preliminary data sheet 14 micronas quasi-peak detector quasi peak readout r quasi peak readout l beeper prescale deemphasis 50/75 s fm-matrix deemphasis j17 prescale dc level readout fm2 dc level readout fm1 prescale scart fm /am nicam msp 3415d only fig. 4 ? 5: audio baseband processing (dsp-firmware) internal signal lines (see fig. 4 ? 2 and fig. 4 ? 3) nicama analog inputs demodulated if inputs loudspeaker channel matrix bass treble volume scart1 channel matrix volume loudspeaker l loudspeaker r scart1_l scart1_r channel souce select loudspeaker outputs scart output balance scartl scartr nicama nicamb fm1/am fm2 avc loudness 2 s bus n puts i 2 s1l i 2 s1r i 2 s2l i 2 s2r prescale prescale i 2 s1 i 2 s2 i 2 s outputs i 2 s channel matrix i 2 sr i 2 sl table 4 ? 1: some examples for recommended channel assignments for demodulator and audio processing part mode msp sound if- channel 1 msp sound if- channel 2 fm- matrix channel- select channel matrix b/g-stereo fm2 (5.74 mhz): r fm1 (5.5 mhz): (l+r)/2 b/g stereo speakers: fm stereo b/g-bilingual fm2 (5.74 mhz): sound b fm1 (5.5 mhz): sound a no matrix speakers: fm speakers: sound a h. phone: sound b nicam-i-st/ fm-mono nicam (6.552 mhz) fm (6.0 mhz): mono no matrix speakers: nicam speakers: stereo h. phone: sound a sat-mono not used fm (6.5 mhz): mono no matrix speakers: fm sound a sat-stereo 7.2 mhz: r 7.02 mhz: l no matrix speakers: fm stereo sat-bilingual 7.38 mhz: sound c 7.02 mhz: sound a no matrix speakers: fm speakers: sound a h. phone: sound b=c sat-high dev. mode don ? t care 6.552 mhz no matrix speakers: fm speakers: sound a h. phone: sound a 4.4. audio pll and crystal specifications the msp 34x5d requires a 18.432 mhz (12 pf, parallel) crystal. the clock supply of the whole system depends on the msp 34x5d operation mode: 1. fm-stereo, fm-mono: the system clock runs free on the crystal ? s 18.432 mhz. 2. nicam: an integrated clock pll uses the 364 khz baud-rate, accomplished in the nicam demodulator block, to lock the system clock to the bit rate, respectively, 32 khz sampling rate of the nicam transmitter. as a re- sult, the whole audio system is supplied with a con- trolled 18.432 mhz clock. remark on using the crystal: external capacitors at each crystal pin to ground are re- quired (see general crystal recommendations on page 60). 4.5. digital control output pins the static level of two output pins of the msp 34x5d (d_ctr_out0/1) is switchable between high and low by means of the i 2 c-bus. this enables the control- ling of external hardware controlled switches or other devices via i 2 c-bus (see section 7.3.18.).
msp 34x5d preliminary data sheet 15 micronas 4.6. i 2 s bus interface by means of this standardized interface, additional fea- ture processors can be connected to the msp 34x0d. two possible formats are supported: the standard mode (mode_reg[4]=0) selects the sony format, where the i2s_ws signal changes at the word bound- aries. the philips format, which is characterized by a change of the i2s_ws signal one i2s_cl period before the word boundaries, is selected by setting mode_reg[4]=1. the msp 34x5d normally serves as the master on the i 2 s interface. here, the clock and word strobe lines are driven by the msp. by setting mode_reg[3]=1, the msp 34x5d is switched to a slave mode. now, these lines are input to the msp and the master clock is syn- chronized to 576 times the i2s_ws rate (32 khz). ni- cam operation is not possible in this mode. the i 2 s bus interface consists of five pins: 1. i2s_da_in1, i2s_da_in2: for input, four channels (two channels per line, 2*16 bits) per sampling cycle (32 khz) are transmitted. 2. i2s_da_out: for output, two channels (2*16 bits) per sampling cycle (32 khz) are transmitted. 3. i2s_cl: gives the timing for the transmission of i 2 s serial data (1.024 mhz). 4. i2s_ws: the i2s_ws word strobe line defines the left and right sample. a precise i 2 s timing diagram is shown in fig. 4 ? 6. philips mode i2s_ws i2s_cl i2s_dain i2s_daout sony mode sony mode philips mode detail c detail a detail b 16 bit left channel 16 bit left channel 16 bit right channel 16 bit right channel i2s_cl i2s_ws as input i2s_ws as output philips/sony mode programmable by mode_reg[4] 1/f i2scl t i2sws1 t i2sws2 t i2s5 t i2s6 t i2s2 t i2s3 t i2s4 t i2s1 detail c detail a,b 1/f i2sws i2s_cl i2s_da_in i2s_da_out r lsb l msb r lsb l msb l lsb r msb l lsb r msb r lsb l lsb r lsb l lsb fig. 4 ? 6: i 2 s bus timing diagram (data: msb first)
msp 34x5d preliminary data sheet 16 micronas 5. i 2 c bus interface: device and subaddresses as a slave receiver, the msp 34x5d can be controlled via i 2 c bus. access to internal memory locations is achieved by subaddressing. the demodulator and the dsp processor parts have two separate subaddressing register banks. in order to allow for more msp 34x5d ics to be con- nected to the control bus, an adr_sel pin has been im- plemented. with adr_sel pulled to high, low, or left open, the msp 34x5d responds to changed device ad- dresses. thus, three identical devices can be selected. by means of the reset bit in the control register, all devices with the same device address are reset. the ic is selected by asserting a special device address in the address part of an i 2 c transmission. a device ad- dress pair is defined as a write address (80, 84, or 88 hex ) and a read address (81, 85, or 89 hex ) (see table 5 ? 1). writing is done by sending the device write address, fol- lowed by the subaddress byte, two address bytes, and two data bytes. reading is done by sending the device write address, followed by the subaddress byte and two address bytes. without sending a stop condition, read- ing of the addressed data is completed by sending the device read address (81, 85, or 89 hex ) and reading two bytes of data (see fig. 5 ? 1: ? i 2 c bus protocol ? and sec- tion 5.2. ? proposal for msp 34x5d i 2 c telegrams ? ). due to the internal architecture of the msp 34x5d the ic cannot react immediately to an i 2 c request. the typical response time is about 0.3 ms for the dsp processor part and 1 ms for the demodulator part if nicam proces- sing is active. if the receiver (msp) can ? t receive another complete byte of data until it has performed some other function; for example, servicing an internal interrupt, it can hold the clock line i 2 c_cl low to force the trans- mitter into a wait state. the positions within a transmis- sion where this may happen are indicated by ? wait ? in section 5.1. the maximum wait-period of the msp dur- ing normal operation mode is less than 1 ms. i 2 c bus error caused by msp hardware problems: in case of any internal error, the msps wait-period is ex- tended to 1.8 ms. afterwards, the msp does not ac- knowledge (nak) the device address. the data line will be left high by the msp and the clock line will be re- leased. the master can then generate a stop condition to abort the transfer. by means of nak, the master is able to recognize the er- ror state and to reset the ic via i 2 c bus. while transmit- ting the reset protocol (see section 5.2.4. on page 18) to ? control ? , the master must ignore the not acknowl- edge bits (nak) of the msp. a general timing diagram of the i 2 c bus is shown in fig. 5 ? 2 on page 18. table 5 ? 1: i 2 c bus device addresses adr_sel low high left open mode write read write read write read msp device address 80 hex 81 hex 84 hex 85 hex 88 hex 89 hex table 5 ? 2: i 2 c bus subaddresses name binary value hex value mode function control 0000 0000 00 w software reset test 0000 0001 01 w only for internal use wr_dem 0001 0000 10 w write address demodulator rd_dem 0001 0001 11 w read address demodulator wr_dsp 0001 0010 12 w write address dsp rd_dsp 0001 0011 13 w read address dsp
msp 34x5d preliminary data sheet 17 micronas table 5 ? 3: control register (subaddress: 00 hex ) name subaddress msb 14 13..1 lsb control 00 hex 1 : reset 0 : normal 0 0 0 5.1. protocol description write to dsp or demodulator s write device address wait ack sub-addr ack addr-byte high ack addr-byte low ack data-byte high ack data-byte low ack p read from dsp or demodulator s write device address wait ack sub-addr ack addr-byte high ack addr-byte low ack s read device address wait ack data-byte high ??? ? ? ? ??? ack data-byte low ?? ?? ?? nak p write to control or test registers s write device address wait ack sub-addr ack data-byte high ack data-byte low ack p note: s = i 2 c-bus start condition from master p = i 2 c-bus stop condition from master ack = acknowledge-bit: low on i2c_da from slave (= msp, gray) or master (= ccu, hatched) nak = not acknowledge-bit: high on i2c_da from master (= ccu, hatched) to indicate ? end of read ? or from msp indicating internal error state wait = i 2 c-clock line held low by the slave (= msp) while interrupt is serviced (<1.8 ms) fig. 5 ? 1: i 2 c bus protocol i 2 c_da i 2 c_cl 1 0 sp (msb first; data must be stable while clock is high)
msp 34x5d preliminary data sheet 18 micronas i2c_cl i2c_da as input i2c_da as output 1/f i2c t i2c3 t i2c1 t i2c5 t i2c6 t i2c2 t i2col2 t i2col1 t i2c4 fig. 5 ? 2: i 2 c bus timing diagram data: msb first 5.2. proposal for msp 34x5d i 2 c telegrams 5.2.1. symbols daw write device address dar read device address < start condition > stop condition aa address byte dd data byte 5.2.2. write telegrams write to control register write data into demodulator write data into dsp 5.2.3. read telegrams read data from demodulator read data from dsp 5.2.4. examples <80 00 80 00> reset msp statically <80 00 00 00> clear reset <80 12 00 08 01 20> set loudspeaker channel source to nicam and matrix to stereo
msp 34x5d preliminary data sheet 19 micronas 5.3. start-up sequence: power-up and i 2 c-controlling after power-on or reset (see fig. 5 ? 3), the ic is in an inactive state. the ccu has to transmit the required co- efficient set for a given operation via the i 2 c bus. initial- ization should start with the demodulator part. if required for any reason, the audio processing part can be loaded before the demodulator part. 4.5 v internal reset t/ms resetq avsup high low t/ms t/ms dvsup 0.7 ? 3: power-up sequence power-up reset: threshold and timing note: 0.7
msp 34x5d preliminary data sheet 20 micronas 6. programming the demodulator section 6.1. short-programming and general programming of the demodulator part the demodulator part of the msp 34x5d can be programmed in two different modes : 1. demodulator short-programming facilitates a comfortable way to set up the demodulator for many ter- restrial tv-sound standards with one single i 2 c-bus transmission. the coding is listed in section 6.4.1.. if a parameter doesn ? t coincide with the individual program- ming concept, it simply can be overwritten by using the general programming mode. some bits of the registers ad_cv (see section 6.5.1. ) and mode_reg (see sec- tion 6.5.2. ) are not affected by the short-programming. they must be transmitted once if their reset status does not fit. the demodulator short-programming is not com- patible to msp 3410b and msp 3400c. autodetection for terrestrial tv standards (as part of the below demodulator short-programming) provides the most comfortable way to set up the mspd-demodu- lator. this feature facilitates within 0.5 s the detection and set-up of the actual tv-sound standard. since the detected standard is readable by the control processor, the autodetection feature is mainly recommended for the primary set-up of a tv-set: after having determined once the corresponding tv-channels, their sound stan- dards can be stored and later on programmed by the de- modulator short-programming (see sections 6.4.1. and 6.6.1.). 2. general programming ensures the software com- patibility to other msps. it offers a very flexible way to ap- ply all of the msp 34x5d demodulator facilities. all regis- ters except 0020 hex have to be written with values corresponding to the individual requirements. for satel- lite applications, with their many variations, this mode must be selected. all transmissions on the control bus are 16 bits wide. however, data for the demodulator part have only 8 or 12 significant bits. these data have to be inserted lsb- bound and filled with zero bits into the 16-bit transmis- sion word. table 4 ? 1 explains how to assign fm carriers to the msp-sound if channels and the corresponding matrix modes in the audio processing part.
msp 34x5d preliminary data sheet 21 micronas 6.2. demodulator write registers: table and addresses table 6 ? 1: demodulator write registers; subaddress: 10 hex ; these registers are not readable! demodulator write registers address (hex) function demodulator short- programming 0020 write into this register to apply demodulator short programming (see section 6.4.1.). if the internal setting coincidences with the individual re- quirements no more of the remaining demodulator write registers have to be transferred. auto_fm/am 0021 only for nicam (msp 3415d): automatic switching between nicam and fm/am in case of bad nicam reception (see section 6.4.2.) write registers necessary for general programming mode only ad_cv 00bb input selection, configuration of agc, mute function and selection of a/d-converter, fm-carrier-mute on/off mode_reg 0083 mode register fir1 fir2 0001 0005 filter coefficients channel 1 (6 ? ? ? ? 2: demodulator read registers; subaddress: 11 hex ; these registers are not writeable! demodulator read registers address (hex) function result of autodetection 007e see table 6 ? 13 c_ad_bits 0023 nicam-sync bit, nicam-c-bits, and three lsbs of additional data bits add_bits 0038 nicam: bit [10:3] of additional data bits cib_bits 003e nicam: cib1 and cib2 control bits error_rate 0057 nicam error rate, updated with 182 ms conc_ct 0058 only to be used in mspb compatibility mode fawct_ist 0025 only to be used in mspb compatibility mode pll_caps 021f not for customer use. agc_gain 021e not for customer use. note: all nicam relevant registers are ? 0 ? for msp 3405d.
msp 34x5d preliminary data sheet 22 micronas 6.4. demodulator write registers for short-programming: functions and values in the following, the functions of some registers are explained and their (default) values are defined: 6.4.1. demodulator short-programming table 6 ? 3: msp 34x5d demodulator short-programming demodulator short-programming 0020 hex tv-sound standard internal setting description code (hex) ad_cv 2) (see table 6 ? 5) mode_ reg 2) (see table 6 ? 8) dco1 (mhz) dco2 (mhz) fir1/2 coefficients identifica- tion mode autodetection 0001 detects and sets one of the standards listed below, if available. results are to be read out of the demodulator read register ? result of autodetection ? (section 6.6.1.) m dual-fm 0002 ad_cv-fm m1 4.72421 4.5 reset, then standard m b/g dual-fm 0003 ad_cv-fm m1 5.74218 5.5 see table 6 ? 11: terrestrial tv- reset then d/k1 dual-fm 0004 ad_cv-fm m1 6.25781 6.5 standards reset , then standard b/g d/k2 dual-fm 0005 ad_cv-fm m1 6.74218 6.5 b/g 0006/ 0007 reserved for future dual fm standards auto_ fm/am nicam-modes for msp 3415d only; msp 3405d responds with fm/am mono b/g-nicam-fm 0008 ad_cv-fm m2 5.85 5.5 1) l-nicam-am 0009 ad_cv-am m3 5.85 6.5 see table 6 ? 11: terrestrial tv 1) i-nicam-fm 000a ad_cv-fm m2 6.552 6.0 terrestrial tv - standards 1) d/k-nicam-fm 000b ad_cv-fm m2 5.85 6.5 >000b reserved for future nicam standards 1) corresponds to the actual setting of auto_fm (address = 0021 hex ) 2) bits of ad_cv or mode_reg, which are not affected by the short-programming, must be transmitted sepa- rately if their reset status does not fit. note: all parameters in the dsp section (audio baseband processing), except the identification mode register, are not affected by the demodulator short-programming . they still have to be defined by the control processor.
msp 34x5d preliminary data sheet 23 micronas 6.4.2. auto_fm/am: automatic switching between nicam and fm/am-mono (msp 3415d only) in case of bad nicam transmission or loss of the ni- cam-carrier, the mspd offers a comfortable mode to switch back to the fm/am-mono signal. if automatic switching is active, the msp internally evaluates the er- ror_rate. all output channels which are assigned to the nicam-source are switched back to the fm/am- mono source without any further ccu instruction, if the nicam-carrier fails or the error_rate exceeds the definable threshold. note, that the channel matrix of the corresponding out- put-channels must be set according to the nicam-mode and need not be changed in the fm/am-fall-back case. an appropriate hysteresis algorithm avoids oscillating effects. bit 11 of the register c_ad_bits (address: 0023 hex ) informs about the actual nicam-fm/am-sta- tus (see section 6.6.2.). there are two possibilities to define the threshold decid- ing for nicam or fm/am-mono (see table 6 ? 4): 1. default value of the mspd (internal threshold=700, i.e. switch to fm/am if error_rate > 700) 2. definable by the customer (recommendable range: threshold = 50....2000, i. e. bits [10:1] = 25...1000). note: the auto_fm feature is only active if the nicam-bit of mode_reg is set. table 6 ? 4: coding of automatic nicam-fm/am switching; reset status: mode 0 mode auto_fm [11....0] addr. = 0021 hex selected sound at the nicam channel select threshold comment 0. default bit [0] = 0 bits [11...1] = 0 always nicam none compatible to msp 3410b, i.e. automatic switching is disabled 1. bit [0] = 1 bit [11:1] = 0 nicam or fm/am, depending on error_rate 700 dec automatic switching with internal threshold 2. bit [0] = 1 bit [10:1] = 25...1000 int = threshold/2 bit [11] = 0 nicam or fm/am, depending on error_rate set by customer automatic switching with external threshold 3. bit [11] = [0] = 1 bit [10...1]= 0 always fm/am none forced fm-mono mode, i.e. automatic switching is disabled
msp 34x5d preliminary data sheet 24 micronas 6.5. demodulator write registers for the general programming mode: functions and values 6.5.1. register ? ad_cv ? table 6 ? 5: ad_cv register; reset status: all bits are ? 0 ? ad_cv 00bb hex set by short-programming bit meaning settings ad_cv-fm ad_cv-am ad_cv [0] not used must be set to 0 0 0 ad_cv [6:1] reference level in case of automat- ic gain control = on (see table 6 ? 6). constant gain factor when automatic gain control = off (see table 6 ? 7). 101000 100011 ad_cv [7] determination of automatic gain or constant gain 0 = constant gain 1 = automatic gain 1 1 ad_cv [8] not used must be set to 0 not affected not affected ad_cv [9] msp-carrier-mute function (must be switched off in high deviation mode) 0 = off: no mute 1 = on: mute as described in section 4.1.8. on page 12 1 0 ad_cv [15 ? 10] not used must be set to 0 0 0 table 6 ? 6: reference values for active agc (ad_cv[7] = 1) application input signal contains ad_cv [6:1] ref. value ad_cv [6:1] in integer range of input signal at pin ana_in1+ and ana_in2+ terrestrial tv fm-stereo 2 fm carriers 101000 40 0.10 ? 3 v pp 1) fm/nicam 1 fm and 1 nicam carrier 101000 40 0.10 ? 3 v pp 1) am/nicam 1 am and 1 nicam carrier 100011 35 0.10 ? 1.4 v pp recommended: 0.10 ? 0.8v pp nicam only 1 nicam carrier only 010100 20 0.05 ? 1.0 v pp sat 1 or more fm carriers 100011 35 0.10 ? 3 v pp 1) 1) for signals above 1.4 vpp, the minimum gain of 3 db is switched, and overflow of the a/d converter may result. due to the robustness of the internal processing, the ic works up to and even more than 3 vpp, if norm conditions of fm/nicam or fm1/fm2 ratio are supposed. in this overflow case, a loss of fm-s/n-ratio of about 10 db may ap- pear.
msp 34x5d preliminary data sheet 25 micronas table 6 ? 7: ad_cv parameters for constant input gain (ad_cv[7]=0) step ad_cv [6:1] constant gain gain (db) input level at pin ana_in1+ 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 000000 000001 000010 000011 000100 000101 000110 000111 001000 001001 001010 001011 001100 001101 001110 001111 010000 010001 010010 010011 010100 3.00 3.85 4.70 5.55 6.40 7.25 8.10 8.95 9.80 10.65 11.50 12.35 13.20 14.05 14.90 15.75 16.60 17.45 18.30 19.15 20.00 maximum input level: 3 v pp (fm) or 1 v pp (nicam) 1) maximum input level: 0.14 v pp 1) for signals above 1.4 vpp, the minimum gain of 3 db is switched, and overflow of the a/d converter may result. due to the robustness of the internal processing, the ic works up to and even more than 3 vpp, if norm conditions of fm/nicam or fm1/fm2 ratio are supposed. in this overflow case, a loss of fm-s/n-ratio of about 10 db may appear.
msp 34x5d preliminary data sheet 26 micronas 6.5.2. register ? mode_reg ? the register ? mode_reg ? contains the control bits de- termining the operation mode of the msp 34x5d; table 6 ? 8 explains all bit positions. table 6 ? 8: control word ? mode_reg ? ; reset status: all bits are ? 0 ? mode_reg 0083 hex set by short-programming bit function comment definition m1 m2 m3 [0] not used 0 : strongly recommended 0 0 0 [1] dctr_tri digital control outputs active / tri-state 0 : active 1 : tri-state x x x [2] i2s_tri i2s outputs (i2s_cl, i2s_ws, i2s_da_out) active / tri-state 0 : active 1 : tri-state x x x [3] i 2 s mode 1) master / slave mode of the i 2 s bus 0 : master 1 : slave x x x [4] i2s_ws mode ws due to the sony or philips format 0 : sony 1 : philips x x x [5] not used 1 : recommended x x x [6] nicam 1) mode of msp-ch1 msp 3405d: always fm 0 : fm 1 : nicam 0 1 1 [7] not used 0 : strongly recommended 0 0 0 [8] fm am mode of msp-ch2 0 : fm 1 : am 0 0 1 [9] hdev high deviation mode (channel matrix must be sound a) 0 : normal 1 : high deviation mode 0 0 0 [11:10] not used 0 : strongly recommended 0 0 0 [12] msp-ch1 gain see table 6 ? 11 0 : gain = 6 db 1 : gain = 0 db 0 0 0 [13] fir1-filter coeff. set see table 6 ? 11 0 : use fir1 1 : use fir2 1 0 0 [14] not used 0 : strongly recommended 0 0 0 [15] am-gain gain for am demodulation 0 : 0 db (default. of mspb) 1 : 12 db (recommended) 1 1 1 1) in case of nicam operation, i 2 s slave mode is not possible. in case of i 2 s slave mode, no synchronization to nicam is allowed. x: not affected by short-programming
msp 34x5d preliminary data sheet 27 micronas table 6 ? 9: channel modes ? mode_reg [6, 8, 9] ? nicam bit[6] fm am bit[8] hdev bit[9] msp-ch1 msp-ch2 1 0 0 nicam (undefined sound for msp 3405d) fm1 1 1 0 f or msp 3405d) am 0 0 0 fm2 fm1 0 0 1 ? high deviation fm 6.5.3. fir-parameter the following data values (see table 6 ? 10) are to be transferred 8 bits at a time embedded lsb-bound in a 16-bit word . the loading sequences must be obeyed. to change a coefficient set, the complete block fir1 or fir2 must be transmitted. note: for compatibility with msp 3410b, imreg1 and imreg2 have to be transmitted. the value for imreg1 and imreg2 is 004. due to the partitioning to 8-bit units, the values 04 hex , 40 hex , and 00 hex arise. table 6 ? 10: loading sequence for fir-coefficients fir1 0001 hex (msp-ch1: nicam/fm2) no. symbol name bits value 1 nicam/fm2_coeff. (5) 8 2 nicam/fm2_coeff. (4) 8 3 nicam/fm2_coeff. (3) 8 see table 6 1 1 4 nicam/fm2_coeff. (2) 8 see table 6 ? 11 5 nicam/fm2_coeff. (1) 8 6 nicam/fm2_coeff. (0) 8 fir2 0005 hex (msp-ch2: fm1/am ) no. symbol name bits value 1 imreg1 8 04 hex 2 imreg1 / imreg2 8 40 hex 3 imreg2 8 00 hex 4 fm/am_coef (5) 8 5 fm/am_coef (4) 8 6 fm/am_coef (3) 8 see table 6 1 1 7 fm/am_coef (2) 8 see table 6 ? 11 8 fm/am_coef (1) 8 9 fm/am_coef (0) 8
msp 34x5d preliminary data sheet 28 micronas table 6 ? 11: 8-bit fir-coefficients (decimal integer) for msp 34x5d; reset status: all coefficients are ? 0 ? coefficients for fir1 0001 hex and fir2 0005 hex terrestrial tv-standards fm - satellite fir filter corresponds to a bandpass with a band- width of b = 130 to 500 khz frequency f c b b/g-, d/k- nicam-fm i- nicam-fm l- nicam-am b/g-,d/k-, m-dual fm 130 khz 180 khz 200 khz 280 khz 380 khz 500 khz auto- search coef(i) fir1 fir2 fir1 fir2 fir1 fir2 fir2 fir2 fir2 fir2 fir2 fir2 fir2 fir2 0 ? 2 3 2 3 ? 2 ? 4 3 73 9 3 ? 8 ? 1 ? 1 ? 1 1 ? 8 18 4 18 ? 8 ? 12 18 53 18 18 ? 8 ? 9 ? 1 ? 1 2 ? 10 27 ? 6 27 ? 10 ? 9 27 64 28 27 4 ? 16 ? 8 ? 8 3 10 48 ? 4 48 10 23 48 119 47 48 36 5 2 2 4 50 66 40 66 50 79 66 101 55 66 78 65 59 59 5 86 72 94 72 86 126 72 127 64 72 107 123 126 126 mode- reg[12] 0 0 0 0 1 1 1 1 1 1 0 mode- reg[13] 0 0 0 1 1 1 1 1 1 1 0 for compatibility, except for the fir2-am and the autosearch sets, the fir-filter programming as used for the msp 3410b is also possible.
msp 34x5d preliminary data sheet 29 micronas 6.5.4. dco-registers for a chosen tv standard, a corresponding set of 24-bit registers determining the mixing frequencies of the quadrature mixers, has to be written into the ic. in table 6 ? 12, some examples of dco registers are listed. it is necessary to divide them up into low part and high part. the formula for the calculation of the registers for any chosen if-frequency is as follows: incr dec = int ( f / fs ? ? 12: dco registers for the msp 34x5d; reset status: dco_hi/lo = ? 0000 ? dco1_lo 0093 hex , dco1_hi 009b hex ; dco2_lo 00a3 hex , dco2_hi 00ab hex freq. [mhz] dco_hi hex dco_lo hex freq. [mhz] dco_hi hex dco_lo hex 4.5 03e8 000 5.04 5.5 5.58 5.7421875 0460 04c6 04d8 04fc 0000 038e 0000 00aa 5.76 5.85 5.94 0500 0514 0528 0000 0000 0000 6.0 6.2 6.5 6.552 0535 0561 05a4 05b0 0555 0c71 071c 0000 6.6 6.65 6.8 05ba 05c5 05e7 0aaa 0c71 01c7 7.02 0618 0000 7.2 0640 0000 7.38 0668 0000 7.56 0690 0000
msp 34x5d preliminary data sheet 30 micronas 6.6.1. autodetect of terrestrial tv-audio standards by means of autodetect, the msp 34x5d offers a simple and fast (<0.5 s) facility to detect the actual tv-audio standard. the algorithm checks for the fm-mono and nicam carriers of all common tv-sound standards. the following notes must be considered when applying the autodetect feature: 1. since there is no way to distinguish between am and fm-carrier, a carrier detected at 6.5 mhz is inter- preted as an am-carrier. if video detection results in secam-east, the mspd result ? 9 ? of autodetect must be reinterpreted as ? b hex ? in case of cad_bits[0] = 1, or as ? 4 ? or ? 5 ? by using the demodulator short pro- gramming mode. a simple decision can be made be- tween the two d/k fm-stereo standards by setting d/k1 and d/k2 using the short programming mode and checking the identification of both versions (see table 6 ? 13). 2. during active autodetect, i 2 c-transfers are not rec- ommended except for reading the autodetect result. under no circumstances should the following param- eters: prescale fm/am, fm matrix, deemphasis fm, quasi-peak detector source, and quasi-peak de- tector matrix be written. results exceeding 07ff hex indicate an active autodetect. 3. the results are to be understood as static information, i.e. no evaluation of fm or nicam identification con- cerning the dynamic mode (stereo, bilingual, or mono) are done. 4. before switching to autodetect, the audio processing part should be muted. do not forget to demute after having received the result. table 6 ? 13: result of autodetection result of autodetect 007e hex code detected tv-sound standard (data) hex note: after detection the detected standard is set automatically according to table 6 ? 3. >07ff autodetect still active 0000 no tv sound standard was detected; select sound standard manually 0002 m dual-fm, even if only fm1 is available 0003 b/g dual-fm, even if only fm1 is available 0008 b/g-fm-nicam, only if nicam is available (msp 3415d only) l_am-nicam, whenever a 6.5 mhz carrier is detected, even if nicam is not available. if also d/k might be possible a decision has to be made according to the video-mode: video = secam_east 0009 cad_bits[0] = 0 cad_bits[0] = 1 video = secam_l ? identification mode: autodetection resets and sets the corresponding identification mode. ? prescale fm/am and fm matrix and deemphasis fm are undefined after autodetection.
msp 34x5d preliminary data sheet 31 micronas 6.6.2. c_ad_bits (msp 3415d only) nicam operation mode control bits and a[2...0] of the additional data bits. format: msb c_ad_bits 0023 hex lsb 11 ... 7 6 5 4 3 2 1 0 auto _fm ... a[2] a[1] a[0] c4 c3 c2 c1 s important: ? s ? = bit [0] indicates correct nicam-syn- chronization (s=1). if s = 0, the msp 34x5d has not yet synchronized correctly to frame and sequence, or has lost synchronization. the remaining read registers are therefore not valid. the msp 34x5d mutes the nicam output automatically and tries to synchronize again as long as mode_reg[6] is set. the operation mode is coded by c4-c1 as shown in table 6 ? 14. table 6 ? 14: nicam operation modes as defined by the ebu nicam 728 specification c4 c3 c2 c1 operation mode 0 0 0 0 stereo sound (nicama/b), independent mono sound (fm1) 0 0 0 1 two independent mono signals (nicama, fm1) 0 0 1 0 three independent mono channels (nicama, nicamb, fm1) 0 0 1 1 data transmission only; no audio 1 0 0 0 stereo sound (nicama/b), fm1 car- ries same channel 1 0 0 1 one mono signal (nicama). fm1 carries same channel as nicama 1 0 1 0 two independent mono channels (nicama, nicamb). fm1 carries same channel as nicama 1 0 1 1 data transmission only; no audio x 1 x x unimplemented sound coding option (not yet defined by ebu nicam 728 specification) auto_fm: monitor bit for the auto_fm status: 0: nicam source is nicam 1: nicam source is fm 6.6.3. add_bits [10...3] (msp 3415d only) contains the remaining 8 of the 11 additional data bits. the additional data bits are not yet defined by the ni- cam 728 system. format: msb add_bits 0038 hex lsb 7 6 5 4 3 2 1 0 a[10] a[9] a[8] a[7] a[6] a[5] a[4] a[3] 6.6.4. cib_bits (msp 3415d only) cib bits 1 and 2 (see nicam 728 specifications) format: msb cib_bits 003e hex lsb 7 6 5 4 3 2 1 0 x x x x x x cib1 cib2 6.6.5. error_rate (msp 3415d only) average error rate of the nicam reception in a time in- terval of 182 ms, which should be close to 0.. the initial and maximum value of error_rate is 2047. this val- ue is also active, if the nicam bit of mode_reg is not set. since the value is achieved by filtering, a certain transition time (appr. 0.5 sec) is unavoidable. accept- able audio may have error_rates up to a value of 700int. individual evaluation of this value by the ccu and an ap- propriate threshold may define the fallback mode from nicam to fm/am-mono in case of poor nicam recep- tion. the bit error rate per second (ber) can be calculated by means of the following formula: ber = error_rate * 12.3*10 ? 6 /s if the automatic switching feature (auto_fm; section 6.4.2. on page 23) is applied, reading of error_rate can be omitted. error_rate 0057 hex error free 0000 hex maximum error rate 07ff hex
msp 34x5d preliminary data sheet 32 micronas 6.6.6. conc_ct (for compatibility with msp 3410b) this register contains the actual number of bit errors of the previous 728-bit data frame. evaluation of conc_ct is no longer recommended. 6.6.7. fawct_ist (for compatib ility with msp3410b) for compatibility with msp 3410b this value equals 12 as long as nicam quality is sufficient. it decreases to 0 if nicam reception gets poor. evaluation of fawct_ist is no longer recommended. 6.6.8. pll_caps it is possible to read out the actual setting of the pll_caps. in standard applications, this register is not of interest for the customer. pll_caps 0021f hex minimum frequency 0111 1111 7f hex nominal frequency 0101 0110 56 hex reset maximum frequency 0000 0000 00 hex 6.6.9. agc_gain it is possible to read out the actual setting of agc_gain in automatic gain mode. in standard applications, this register is not of interest for the customer. agc_gain 0021e hex max. amplification (20 db) 0001 0100 14 hex min. amplification (3 db) 0000 0000 00 hex 6.7. sequences to transmit parameters and to start processing after having been switched on, the msp has to be initial- ized by transmitting the parameters according to the load_seq_1/2 of table 6 ? 15. the data are immedi- ately active after transmission into the msp. it is no long- er necessary to transmit load_reg_1/2 or load_reg_1 as it was for msp 3410b. nevertheless, transmission of load_reg_1/2 or load_reg_1 does no harm. for nicam operation, the following steps listed in ? ni- cam_wait, _read and _check ? in table 6 ? 15 must be taken. for fm-stereo operation, the evaluation of the identifica- tion signal must be performed. for a positive identifica- tion check, the msp 34x5d sound channels have to be switched corresponding to the detected operation mode.
msp 34x5d preliminary data sheet 33 micronas table 6 ? 15: sequences to initialize and start the msp 34x5d load_seq_1/2: general initialization general programming mode demodulator short programming write into msp 34x5d: write into msp 34x5d: 1. ad_cv 2. fir1 3. fir2 4. mode_reg 5. dco1_lo 6. dco1_hi 7. dco2_lo 8. dco2_hi for example: addr: 0020 hex , data 0008 hex alternatively, for terrestrial reception, the autodetect feature can be applied. audio processing init initialization of audio baseband processing section, which may be customer dependant (see section 7.). nicam_wait: automatic start of the nicam-decoder if bit[6] of mode_reg is set to 1 1. wait at least 0.25 s nicam_check: read nicam specific information and check for presence, operation mode, and quality of nicam signal. do not read and do not evaluate stereo detection register. read out of msp 34x5d (for msp 3405d, all nicam read registers contain ? 0 ? ): 1. c_ad_bits 2. conc_ct or error_rate; if auto_fm is active, reading of conc_ct or error_rate can be omitted. evaluation of c_ad_bits and conc_ct or error_rate in the ccu (see section 6.6.). if necessary, switch the corresponding sound channels within the audio baseband processing section. fm_wait: automatic start of the fm-identification process if bit[6] of mode_reg is set to 0. 1. ident reset 2. wait at least 0.5 s fm_ident_check: read stereo detection register and check for operation mode of dual carrier fm. do not read and do not evaluate nicam specific information. read out of msp 34x5d: 1. stereo detection register (dsp register 0018 hex , high part) evaluation of the stereo detection register (see section 7.5.1.) if necessary, switch the corresponding sound channels within the audio baseband processing section. load_seq_1: reinitialization of channel 1 without affecting channel 2 write into msp 34x5d: write into msp 34x5d: 1. fir1 (6 ? ? pause ? determines the repetition rate of the nicam or the fm_ident-check.
msp 34x5d preliminary data sheet 34 micronas 6.8. software proposals for multistandard tv-sets to familiarize the reader with the programming scheme of the msp 34x5d demodulator part, three examples in the shape of flow diagrams are shown in the following sections. 6.8.1. multistandard including system b/g or i (nicam/fm-mono only) or secam l (nicam/am-mono only) fig. 6 ? 1 shows a flow diagram for the ccu software, applied for the msp 34x5d in a tv set, which facilitates nicam and fm/am-mono sound. for the instructions, please refer to table 6 ? 15. if the program is changed, resulting in another program within the same tv-sound system, no parameters of the msp 34x5d need be modified. to facilitate the check for nicam, the ccu has only to continue at the ? ni- cam_wait ? instruction. during the nicam-identifica- tion process, the msp 34x5d must be switched to the fm-mono sound. fig. 6 ? 1: ccu software flow diagram for nicam/fm or am mono with demodulator short programming start load_seq_1/2 audio processing init nicam_wait nicam_check pause set sound standard 0008 hex alternatively: 0009 hex 000a hex 6.8.2. multistandard including system b/g with nicam/fm-mono and german dual fm fig. 6 ? 3 shows a flow diagram for the ccu software, applied for the msp 34x5d in a tv set, which supports all standards according to system b/g. for the instruc- tions used in the diagram, please refer to table 6 ? 15. after having switched on the tv-set and having initial- ized the msp 34x5d (load_seq_1/2), fm-mono sound is available. fig. 6 ? 3 shows that to check for any stereo or bilingual audio information, the sound standards 0008 hex (b/g- nicam) and 0003 hex must simply be set alternately. if successful, the msp 3415d must switch to the desired audio mode. 6.8.3. satellite mode fig. 6 ? 2 shows the simple flow diagram to be used for the msp 34x5d in a satellite receiver. for fm-mono op- eration, the corresponding fm carrier should preferably be processed at the msp-channel 2. fig. 6 ? 2: ccu software flow diagram: sat-mode start msp-channel 1 fm2-parameter msp-channel 2 fm1-parameter stop audio processing init 6.8.4. automatic search function for fm-carrier detection the am demodulation ability of the msp 34x5d offers the possibility to calculate the ? field strength ? of the mo- mentarily selected fm carrier, which can be read out by the ccu. in sat receivers, this feature can be used to make automatic fm carrier search possible. therefore, the mspd has to be switched to am-mode (mode_reg[8]), fm-prescale must be set to 7f hex = +127 dec , and the fm dc notch must be switched off. the sound-if frequency range must now be ? scanned ? in the mspd-channel 2 by means of the programmable quadrature mixer with an appropriate in- cremental frequency (i.e. 10 khz).
msp 34x5d preliminary data sheet 35 micronas load_seq_1/2 nicam_wait load_seq_1 ident_check load_seq_1 fig. 6 ? 3: ccu software flow diagram: standard b/g with nicam or fm stereo with demodulator short programming mode stereo/biling. no mono fm_ nicam_check nicam ? start pause yes pause audio processing fm_wait set sound standard 0008 hex init set sound standard 0003 hex set sound standard 0008 hex after each incrementation, a field strength value is avail- able at the quasi-peak detector output (quasi-peak de- tector source must be set to fm), which must be ex- amined for relative maxima by the ccu. this results in either continuing search or switching the msp 34x5d back to fm demodulation mode. during the search process, the fir2 must be loaded with the coefficient set ? autosearch ? , which enables small bandwidth, resulting in appropriate field strength characteristics. the absolute field strength value (can be read out of ? quasi peak detector output fm1 ? ) also gives information on whether a main fm carrier or a sub- carrier was detected, and as a practical consequence, the fm bandwidth (fir1/2) and the deemphasis (50 ? dc level readout fm1 ? . therefore, the fm dc notch must be switched on, and the demodulator part must be switched back to fm-de- modulation mode. for a detailed description of the automatic search func- tion, please refer to the corresponding msp 3400c win- dows software. note: the automatic search is still possible by evaluat- ing only the dc level readout fm1 (dc notch on) as it is described with the msp 3410b, but the above men- tioned method is faster. if this dc level method is ap- plied with the msp 34x5d, it is recommended to set mode_reg[15] to 1 (am-gain= 12 db) and to use the new autosearch fir2 coefficient set as given in table 6 ? 11.
msp 34x5d preliminary data sheet 36 micronas 7. programming the dsp section (audio baseband processing) 7.1. dsp write registers: table and addresses table 7 ? 1: dsp write registers; subaddress: 12 hex ; if necessary these registers are readable as well. dsp write register address high/ low adjustable range, operational modes reset mode volume loudspeaker channel 0000 hex h [+12 db ... ? 114 db, mute] mute volume / mode loudspeaker channel l 1/8 db steps, reduce volume / tone control 00 hex balance loudspeaker channel [l/r] 0001 hex h [0..100 / 100 % and vv][ ? 127..0 / 0 db and vv] 100%/100% balance mode loudspeaker l [linear mode / logarithmic mode] linear mode bass loudspeaker channel 0002 hex h [+12 db ... ? 12 db] 0 db treble loudspeaker channel 0003 hex h [+12 db ... ? 12 db] 0 db loudness loudspeaker channel 0004 hex h [0 db ... +17 db] 0 db loudness filter characteristic l [normal, super_bass] normal spatial effect strength loudspeaker ch. 0005 hex h [ ? 100%...off...+100%] off spatial effect mode/customize l [sbe, sbe+pse] sbe+pse volume scart1 channel 0007 hex h [00 hex ... 7f hex ],[+12 db ... ? 114 db, mute] 00 hex volume / mode scart1 channel l [linear mode / logarithmic mode] linear mode loudspeaker channel source 0008 hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am loudspeaker channel matrix l [sounda, soundb, stereo, mono] sounda scart1 channel source 000a hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am scart1 channel matrix l [sounda, soundb, stereo, mono] sounda i 2 s channel source 000b hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm/am i 2 s channel matrix l [sounda, soundb, stereo, mono] sounda quasi-peak detector source 000c hex h [fm/am, nicam, scart, i 2 s1, i 2 s2] fm /am quasi-peak detector matrix l [sounda, soundb, stereo, mono] sounda prescale scart 000d hex h [00 hex ... 7f hex ] 00 hex prescale fm/am 000e hex h [00 hex ... 7f hex ] 00 hex fm matrix l [no_mat, gstereo, kstereo] no_mat deemphasis fm 000f hex h [off, 50
msp 34x5d preliminary data sheet 37 micronas 7.2. dsp read registers: table and addresses table 7 ? 2: dsp read registers; subaddress: 13 hex ; these registers are not writable dsp read register address high/low output range stereo detection register 0018 hex h [80 hex ... 7f hex ] 8 bit two ? s complement quasi peak readout left 0019 hex h & l [00 hex ... 7fff hex ] 16 bit two ? s complement quasi peak readout right 001a hex h & l [00 hex ... 7fff hex ] 16 bit two ? s complement dc level readout fm1/ch2-l 001b hex h & l [8000 hex ... 7fff hex ] 16 bit two ? s complement dc level readout fm2/ch1-r 001c hex h & l [8000 hex ... 7fff hex ] 16 bit two ? s complement msp hardware version code 001e hex h [00 hex ... ff hex ] msp major revision code 001e hex l [00 hex ... ff hex ] msp product code 001f hex h [05 hex , 0f hex ] msp rom version code 001f hex l [00 hex ... ff hex ]
msp 34x5d preliminary data sheet 38 micronas 7.3. dsp write registers: functions and values write registers are 16 bit wide, whereby the msb is de- noted bit [15]. transmissions via i 2 c bus have to take place in 16-bit words. some of the defined 16-bit words are divided into low [7..0] and high [15..8] byte, or in an other manner, thus holding two different control entities. all write registers are readable. unused parts of the 16-bit registers must be zero. addresses not given in this table must not be written at any time! 7.3.1. volume loudspeaker channel volume loudspeaker 0000 hex [15..4] +12 db 0111 1111 0000 7f0 hex +11.875 db 0111 1110 1110 7ee hex +0.125 db 0111 0011 0010 732 hex 0 db 0111 0011 0000 730 hex ? 0.125 db 0111 0010 1110 72e hex ? 113.875 db 0000 0001 0010 012 hex ? 114 db 0000 0001 0000 010 hex mute 0000 0000 0000 000 hex reset fast mute 1111 1111 1110 ffe hex the highest given positive 8-bit number (7f hex ) yields in a maximum possible gain of 12 db. decreasing the vol- ume register by 1 lsb decreases the volume by 1 db. volume settings lower than the given minimum mute the output. with large scale input signals, positive volume settings may lead to signal clipping. the msp 34x5d loudspeaker volume function is divided up in a digital and an analog section. with fast mute, volume is reduced to mute position by digital volume only. analog volume is not changed. this reduces any audible dc plops. going back from fast mute should be done to the volume step before fast mute was activated. the fast mute facility is activated by the i 2 c command. after 75 ms (typically), the signal is completely ramped down. clipping mode loudspeaker 0000 hex [3..0] reduce volume 0000 0 hex reset reduce tone control 0001 1 hex compromise mode 0010 2 hex if the clipping mode is set to ? reduce volume ? , the fol- lowing clipping procedure is used: to prevent severe clipping effects with bass or treble boosts, the internal volume is automatically limited to a level where, in com- bination with either bass or treble setting, the amplifica- tion does not exceed 12 db. if the clipping mode is ? reduce tone control ? , the bass or treble value is reduced if amplification exceeds 12 db. if the clipping mode is ? compromise mode ? , the bass or treble value and volume are reduced half and half if am- plification exceeds 12 db. example: vol.: +6 db bass: +9 db treble: +5 db red. volume 3 9 5 red. tone con. 6 6 5 compromise 4.5 7.5 5
msp 34x5d preliminary data sheet 39 micronas 7.3.2. balance loudspeaker channel positive balance settings reduce the left channel without affecting the right channel; negative settings reduce the right channel leaving the left channel unaffected. in lin- ear mode, a step by 1 lsb decreases or increases the balance by about 0.8% (exact figure: 100/127). in loga- rithmic mode, a step by 1 lsb decreases or increases the balance by 1 db. balance mode loudspeaker 0001 hex [3..0] linear 0000 0 hex reset logarithmic 0001 1 hex linear mode balance loudspeaker channel [l/r] 0001 hex h left muted, right 100% 0111 1111 7f hex left 0.8%, right 100% 0111 1110 7e hex left 99.2%, right 100% 0000 0001 01 hex left 100%, right 100% 0000 0000 00 hex reset left 100%, right 99.2% 1111 1111 ff hex left 100%, right 0.8% 1000 0010 82 hex left 100%, right muted 1000 0001 81 hex logarithmic mode balance loudspeaker channel [l/r] 0001 hex h left ? 127 db, right 0 db 0111 1111 7f hex left ? 126 db, right 0 db 0111 1110 7e hex left ? 1 db, right 0 db 0000 0001 01 hex left 0 db, right 0 db 0000 0000 00 hex reset left 0 db, right ? 1 db 1111 1111 ff hex left 0 db, right ? 127 db 1000 0001 81 hex left 0 db, right ? 128 db 1000 0000 80 hex 7.3.3. bass loudspeaker channel bass loudspeaker 0002 hex h +20 db 0111 1111 7f hex +18 db 0111 1000 78 hex +16 db 0111 0000 70 hex +14 db 0110 1000 68 hex +12 db 0110 0000 60 hex +11 db 0101 1000 58 hex +1 db 0000 1000 08 hex +1/8 db 0000 0001 01 hex 0 db 0000 0000 00 hex reset ? 1/8 db 1111 1111 ff hex ? 1 db 1111 1000 f8 hex ? 11 db 1010 1000 a8 hex ? 12 db 1010 0000 a0 hex with positive bass settings, internal overflow may occur even with overall volume less than 0 db. this will lead to a clipped output signal. therefore, it is not recom- mended to set bass to a value that, in conjunction with volume, would result in an overall positive gain.
msp 34x5d preliminary data sheet 40 micronas 7.3.4. treble l oudspeaker channel treble loudspeaker 0003 hex h +15 db 0111 1000 78 hex +14 db 0111 0000 70 hex +1 db 0000 1000 08 hex +1/8 db 0000 0001 01 hex 0 db 0000 0000 00 hex reset ? 1/8 db 1111 1111 ff hex ? 1 db 1111 1000 f8 hex ? 11 db 1010 1000 a8 hex ? 12 db 1010 0000 a0 hex with positive treble settings, internal overflow may occur even with overall volume less than 0 db. this will lead to a clipped output signal. therefore, it is not recom- mended to set treble to a value that, in conjunction with volume, would result in an overall positive gain. 7.3.5. loudness loudspeaker channel loudness loudspeaker 0004 hex h +17 db 0100 0100 44 hex +16 db 0100 0000 40 hex +1 db 0000 0100 04 hex 0 db 0000 0000 00 hex reset mode loudness loudspeaker 0004 hex l normal (constant volume at 1 khz) 0000 0000 00 hex reset super bass (constant volume at 2 khz) 0000 0100 04 hex loudness increases the volume of low and high frequen- cy signals, while keeping the amplitude of the 1 khz ref- erence frequency constant. the intended loudness has to be set according to the actual volume setting. be- cause loudness introduces gain, it is not recommended to set loudness to a value that, in conjunction with vol- ume, would result in an overall positive gain. by means of ? mode loudness ? , the corner frequency for bass amplification can be set to two different values. in super bass mode, the corner frequency is shifted up. the point of constant volume is shifted from 1 khz to 2 khz. 7.3.6. spatial effects loudspeaker channel spatial effect strength loudspeaker 0005 hex h enlargement 100% 0111 1111 7f hex enlargement 50% 0011 1111 3f hex enlargement 1.5% 0000 0001 01 hex effect off 0000 0000 00 hex reset reduction 1.5% 1111 1111 ff hex reduction 50% 1100 0000 c0 hex reduction 100% 1000 0000 80 hex spatial effect mode loudspeaker 0005 hex [7:4] stereo basewidth en- largement (sbe) and pseudo stereo effect (pse). (mode a) 0000 0 hex reset 0000 0 hex stereo basewidth en- largement (sbe) only. (mode b) 0010 2 hex spatial effect cus- tomize coefficient loudspeaker 0005 hex [3:0] max high pass gain 0000 0 hex reset 2/3 high pass gain 0010 2 hex 1/3 high pass gain 0100 4 hex min high pass gain 0110 6 hex automatic 1000 8 hex
msp 34x5d preliminary data sheet 41 micronas there are several spatial effect modes available: mode a (low byte = 00 hex ) is compatible to the formerly used spatial effect. here, the kind of spatial effect de- pends on the source mode. if the incoming signal is in mono mode, pseudo stereo effect is active; for stereo signals, pseudo stereo effect and stereo basewidth enlargement is effective. the strength of the effect is controllable by the upper byte. a negative value reduces the stereo image. a rather strong spatial effect is recom- mended for small tv sets where loudspeaker spacing is rather close. for large screen tv sets, a more moderate spatial effect is recommended. in mode a, even in case of stereo input signals, pseudo stereo effect is active, which reduces the center image. in mode b, only stereo basewidth enlargement is effec- tive. for mono input signals, the pseudo stereo effect has to be switched on. it is worth mentioning, that all spatial effects affect ampli- tude and phase response. with the lower 4 bits, the fre- quency response can be customized. a value of 0000 bin yields a flat response for center signals (l = r) but a high pass function of l or r only signals. a value of 0110 bin has a flat response for l or r only signals but a lowpass function for center signals. by using 1000 bin , the fre- quency response is automatically adapted to the sound material by choosing an optimal high pass gain. 7.3.7. volume scart1 volume mode scart1 0007 hex [3..0] linear 0000 0 hex reset logarithmic 0001 1 hex linear mode volume scart1 0007 hex h off 0000 0000 00 hex reset 0 db gain (digital full scale (fs) to 2 v rms output) 0100 0000 40 hex +6 db gain ( ? 6 dbfs to 2 v rms output) 0111 1111 7f hex logarithmic mode volume scart1 0007 hex [15..4] +12 db 0111 1111 0000 7f0 hex +11.875 db 0111 1110 1110 7ee hex +0.125 db 0111 0011 0010 732 hex 0 db 0111 0011 0000 730 hex ? 0.125 db 0111 0010 1110 72e hex ? 113.875 db 0000 0001 0010 012 hex ? 114 db 0000 0001 0000 010 hex mute 0000 0000 0000 000 hex reset 7.3.8. channel source modes loudspeaker source 0008 hex h scart1 source 000a hex h i 2 s source 000b hex h quasi-peak detector source 000c hex h fm/am 0000 0000 00 hex reset nicam (msp 3415d only) 0000 0001 01 hex scart 0000 0010 02 hex i 2 s1 0000 0101 05 hex i 2 s2 0000 0110 06 hex 7.3.9. channel matrix modes loudspeaker matrix 0008 hex l scart1 matrix 000a hex l i 2 s matrix 000b hex l quasi-peak detector matrix 000c hex l sounda / left / msp-if-channel2 0000 0000 00 hex reset soundb / right / msp-if-channel1 0001 0000 10 hex stereo 0010 0000 20 hex mono 0011 0000 30 hex
msp 34x5d preliminary data sheet 42 micronas 7.3.10. scart prescale volume prescale scart 000d hex h off 0000 0000 00 hex reset 0 db gain (2 v rms in- put to digital full scale) 0001 1001 19 hex +14 db gain (400 mv rms input to digital full scale) 0111 1111 7f hex comments for the fm/am-prescaling: for the high deviation mode, the fm prescaling values can be used in the range from 13 hex to 30 hex . please consider the internal reduction of 6 db for this mode. the fir-bandwidth should be selected to 500 khz. 1) given deviations will result in internal digital full scale signals. appropriate clipping headroom has to be set by the customer. this can be done by decreasing the listed values by a specific factor. 2) in the mentioned sif-level range, the am-output level remains stable and independent of the actual sif-level. in this case, only the am degree of audio signals above 40 hz determines the am-output level. 7.3.11. fm/am prescale volume prescale fm (normal fm mode) 000e hex h off 0000 0000 00 hex reset maximum volume (28 khz deviation 1) recommended fir- bandwidth: 130 khz) 0111 1111 7f hex deviation 50 khz 1) recommended fir- bandwidth: 200 khz 0100 1000 48 hex deviation 75 khz 1) recommended fir- bandwidth: 200 or 280 khz 0011 0000 30 hex deviation 150 khz 1) recommended fir- bandwidth: 380 khz 0001 1000 18 hex maximum deviation 192 khz 1) recommended fir- bandwidth: 380 khz 0001 0011 13 hex prescale for adaptive deemphasis wp1 recommended fir- bandwidth: 130 khz 0001 0000 10 hex volume prescale fm (high dev.- mode) 000e hex h off 0000 0000 00 hex reset deviation 150 khz 1) recommended fir- bandwidth: 380 khz 0011 0000 30 hex maximum deviation 384 khz 1) recommended fir- bandwidth: 500 khz 0001 0100 14 hex volume prescale am 000e hex h off 0000 0000 00 hex reset sif input level: 0.1 vpp ? 0.8 vpp 1) 2) 0.8 vpp ? 1.4 vpp 1) 0111 1100 7c hex <7c hex note: for am, the bit mode_reg[15] must be 1.
msp 34x5d preliminary data sheet 43 micronas 7.3.12. fm matrix modes fm matrix 000e hex l no matrix 0000 0000 00 hex reset gstereo 0000 0001 01 hex kstereo 0000 0010 02 hex no_matrix is used for terrestrial mono or satellite ste- reo sound. gstereo dematrixes [(l+r)/2, r] to [l, r] and is used for german dual carrier stereo system (standard b/g). kstereo dematrixes [(l+r)/2, (l ? r)/2] to [l, r] and is used for the korean dual carrier stereo system (standard m). 7.3.13. fm fixed deemphasis deemphasis fm 000f hex h 50 ? 3); [15:14] = 0 ! definition of digital control output pins acb register 0013 hex [15..14] d_ctr_out0 low (reset) high x0 x1 d_ctr_out1 low (reset) high 0x 1x definition of scart switching facilities acb register 0013 hex [13..0] dsp in selection of source: * sc1_in_l/r mono_in sc2_in_l/r mute xx xx00 xx00 0000 xx xx01 xx00 0000 xx xx10 xx00 0000 xx xx11 xx10 0000 sc1_out_l/r selection of source: sc2_in_l/r mono_in scart1 via d/a sc1_in_l/r mute xx 01xx x0x0 0000 xx 10xx x0x0 0000 xx 11xx x0x0 0000 xx 01xx x1x0 0000 xx 11xx x1x0 0000 * = reset position, which becomes active at the time of the first write transmission on the control bus to the audio processing part (dsp). by writing to the acb register first, the reset state can be redefined. note: after reset, sc1_out_l/r is undefined! note: if ? mono_in ? is selected at the dsp_in selec- tion, the channel matrix mode of the corresponding out- put channel(s) must be set to ? sound a ? .
msp 34x5d preliminary data sheet 44 micronas 7.3.19. beeper beeper volume 0014 hex h off 0000 0000 00 hex reset maximum volume (full digital scale fds) 0111 1111 7f hex beeper frequency 0014 hex l 16 hz (lowest) 0000 0001 01 hex 1 khz 0100 0000 40 hex 4 khz (highest) 1111 1111 ff hex a squarewave beeper can be added to the loudspeaker channel. the addition point is just before volume adjust- ment. 7.3.20. identification mode identification mode 0015 hex l standard b/g (german stereo) 0000 0000 00 hex reset standard m (korean stereo) 0000 0001 01 hex reset of ident-filter 0011 1111 3f hex to shorten the response time of the identification algo- rithm after a program change between two fm-stereo capable programs, the reset of the ident-filter can be ap- plied. sequence: 1. program change 2. reset ident-filter 3. set identification mode back to standard b/g 4. wait approx. 0.5 sec. 5. read stereo detection register 7.3.21. fm dc notch the dc compensation filter (fm dc notch) for fm input can be switched off. this is used to speed up the auto- matic search function (see section 6.8.4.). in normal fm- mode, the fm dc notch should be switched on. fm dc notch 0017 hex l on 0000 0000 00 hex reset off 0011 1111 3f hex 7.3.22. automatic volume correction (avc) avc on/off 0029 hex [15:12] avc off and reset of int. variables 0000 0 hex reset avc on 1000 8 hex avc decay time 0029 hex [11:8] 8 sec (long) 4 sec (middle) 2 sec (short) 20 ms (very short) 1) 1000 8 hex 0100 4 hex 0010 2 hex 0001 1 hex 1) intended for quick adaptation to the average volume level after channel change different sound sources (e.g. terrestrial channels, sat channels, or scart) fairly often do not have the same volume level. advertisements during movies usually have a higher volume level than the movie itself. this re- sults in annoying volume changes. the avc solves this problem by equalizing the volume level. to prevent clipping, the avc ? s gain decreases quickly in dynamic boost conditions. to suppress oscillation ef- fects, the gain increases rather slowly for low-level in- puts. the decay time is programmable by the avc regis- ter bits [11:8]. for input signals ranging from ? ? ? 1 shows the avc output level versus its input level. for prescale and volume registers set to 0 db, a level of 0 dbr corre- sponds to full scale input/output. this is ? scart in-, output 0 dbr = ? loudspeaker and aux output 0 dbr =
msp 34x5d preliminary data sheet 45 micronas ? 30 ? 24 ? 18 ? 12 ? 6+6 input level ? 18 ? 24 ? 12 output level 0 [dbr] [dbr] fig. 7 ? 1: simplified avc characteristics to reset the internal variables, the avc should be switched off and on during any channel or source change. for standard applications, the recommended decay time is 4 sec. note: avc should not be used in any dolby pro logic mode. 7.4. exclusions for the audio baseband features in general, all functions can be switched independently of the others. one exception exists: 1. nicam cannot be processed simultaneously with the fm2 channel (msp 3415d only). 2. fm adaptive deemphasis wpi cannot be processed simultaneously with the fm-identification. 7.5. dsp read registers: functions and values all readable registers are 16-bit wide. transmissions via i 2 c bus have to take place in 16-bit words. single data entries are 8 bit. some of the defined 16-bit words are divided into low and high byte, thus holding two different control entities. these registers are not writeable. 7.5.1. stereo detection register stereo detection register 0018 hex h stereo/bilingual mode reading id-level (two ? s complement) mono near zero stereo positive value (ideal reception: 7f hex ) bilingual negative value (ideal reception: 80 hex) if fm adaptive deemphasis wp1 is active, the id-level in stereo detection register is not valid. a control processor evaluating the content of the stereo detection register (id-level), should use the threshold recommendations, shown in fig. 7 ? 2 for switching to stereo/bilingual and back to mono mode. fig. 7 ? 2: recommended thresholds for stereo/ mono/bilingual switching mode id-level stereo biling. mono 20 25 ? 20 ? 25 [dec] 7.5.2. quasi-peak detector quasi-peak readout left 0019 hex h+l quasi-peak readout right 001a hex h+l quasi peak readout [0 hex ... 7fff hex ] values are 16 bit two ? s complement the quasi peak readout register can be used to read out the quasi peak level of any input source, in order to ad- just all inputs to the same normal listening level. the re- fresh rate is 32 khz. the feature is based on a filter time constant: attack-time: 1.3 ms decay-time: 37 ms
msp 34x5d preliminary data sheet 46 micronas 7.5.3. dc level register dc level readout fm1 (msp-ch2) 001b hex h+l dc level readout fm2 (msp-ch1) 001c hex h+l dc level [8000 hex ... 7fff hex ] values are 16 bit two ? s complement the dc level register measures the dc component of the incoming fm signals (fm1 and fm2). this can be used for seek functions in satellite receivers and for if fm frequencies fine tuning. a too low demodulation fre- quency (dco) results in a positive dc-level and vice versa. for further processing, the dc content of the de- modulated fm signals is suppressed. the time constant , ? a 2 01 hex msp 34x5d ? b 3 02 hex a change in the hardware version code defines hard- ware optimizations that may have influence on the chip ? s behavior. the readout of this register is identical to the hardware version code in the chip ? s imprint. 7.5.5. msp major revision code major revision 001e hex l msp 34x5 d 04 hex the msp 34x5d is the fourth generation of ics in the msp family. 7.5.6. msp product code product 001f hex h msp 34 05 d 05 hex msp 34 15 d 0f hex by means of the msp-product code, the control proces- sor is able to decide whether or not nicam-controlling should be accomplished. 7.5.7. msp rom version code rom version 001f hex l major software revision [00 hex ... ff hex ] msp 34x5d ? a 2 22 hex msp 34x5d ? b 3 23 hex a change in the rom version code defines internal soft- ware optimizations, that may have influence on the chip ? s behavior, e.g. new features may have been in- cluded. while a software change is intended to create no compatibility problems, customers that want to use the new functions can identify new msp 34x5d versions ac- cording to this number. to avoid compatibility problems with the mspb series, an offset of 20 hex is added to the rom version code of the chip ? s imprint.
msp 34x5d preliminary data sheet 47 micronas 8. specifications 8.1. outline dimensions fig. 8 ? 1: 68-pin plastic leaded chip carrier package (plcc68) weight approximately 4.8 g dimensions in mm 24.2 0.1 ? 2: 64-pin plastic shrink dual inline package (psdip64) weight approximately 9.0 g dimensions in mm 20.3 ? 3: 52-pin plastic shrink dual in line package (psdip52) weight approximately 5.5 g dimensions in mm 16.3
msp 34x5d preliminary data sheet 48 micronas fig. 8 ? 4: 80-pin plastic quad flat package (pqfp80) weight approximately 1.61 g dimensions in mm 15 x 0.8 = 12.0 0.1 ? 5: 44-pin plastic metric quad flat package (pmqfp44) weight approx. 0.4 g dimensions in mm spgs0006-3(p44)/1e 34 44 1 11 12 22 23 33 1.3 1.75 1.75 0.1 0.8 0.8 13.2 0.2
msp 34x5d preliminary data sheet 49 micronas 8.2. pin connections and short descriptions nc = not connected ( leave vacant for future compatibility reasons) tp = test pin ( leave vacant ; pin is used for production test only) lv = leave vacant x = obligatory; connect as described in application circuit diagram pin no. pin name type connection (if not sed) short description plcc 68-pin psdip 64-pin psdip 52-pin pqfp 80-pin pmqfp 44-pin (if not u sed) 1 16 14 9 ? tp out lv test pin 2 ? ? ? ? nc lv not connected 3 15 13 8 ? tp out lv test pin 4 14 12 7 17 i2s_da_in1 in lv i 2 s1 data input 5 13 11 6 16 i2s_da_out out lv i 2 s data output 6 12 10 5 15 i2s_ws in/out lv i 2 s word strobe 7 11 9 4 14 i2s_cl in/out lv i 2 s clock 8 10 8 3 13 i2c_da in/out x i 2 c data 9 9 7 2 12 i2c_cl in/out x i 2 c clock 10 8 ? 1 ? nc lv not connected 11 7 6 80 11 standbyq in x standby (low-active) 12 6 5 79 10 adr_sel in x i 2 c bus address select 13 5 4 78 9 d_ctr_out0 out lv digital control output 0 14 4 3 77 8 d_ctr_out1 out lv digital control output 1 15 3 ? 76 ? nc lv not connected 16 2 ? 75 ? nc lv not connected 17 ? ? ? ? nc lv not connected 18 1 2 74 1) ? nc lv not connected 19 64 1 73 7 tp lv test pin 20 63 52 72 6 xtal_out out x crystal oscillator 21 62 51 71 5 xtal_in in x crystal oscillator 22 61 50 70 4 testen in x test pin 23 60 49 69 ? nc lv not connected 24 59 48 68 3 ana_in ? in lv if common 25 58 47 67 2 ana_in1+ in lv if input 1 26 57 46 66 1 avsup x analog power supply +5 v ? ? ? 65 ? avsup x analog power supply +5 v ? ? ? 64 ? nc lv not connected ? ? ? 63 ? nc lv not connected
msp 34x5d preliminary data sheet 50 micronas short description connection (if not used) type pin name pin no. short description connection (if not used) pmqfp 44-pin pqfp 80-pin psdip 52-pin psdip 64-pin plcc 68-pin 27 56 45 62 44 avss x analog ground ? ? ? 61 ? avss x analog ground 28 55 44 60 43 mono_in in lv mono input ? ? ? 59 ? nc lv not connected 29 54 43 58 42 vreftop x reference voltage if a/d converter 30 53 42 57 41 sc1_in_r in lv scart 1 input, right 31 52 41 56 40 sc1_in_l in lv scart 1 input, left 32 51 ? 55 39 asg1 ahvss analog shield ground 1 33 50 40 54 38 sc2_in_r in lv scart 2 input, right 34 49 39 53 37 sc2_in_l in lv scart 2 input, left 35 48 ? 52 1) ? nc lv or ahvss not connected 36 47 38 51 ? nc lv not connected 37 46 37 50 ? nc lv not connected 38 45 ? 49 ? nc lv not connected 39 44 ? 48 ? nc lv not connected 40 43 ? 47 ? nc lv not connected 41 ? ? 46 ? nc lv not connected 42 42 36 45 36 agndc x analog reference voltage high voltage part 43 41 35 44 35 ahvss x analog ground ? ? ? 43 ? ahvss x analog ground ? ? ? 42 ? nc lv not connected ? ? ? 41 ? nc lv not connected 44 40 34 40 34 capl_m x volume capacitor main 45 39 33 39 33 ahvsup x analog power supply +8 v 46 38 32 38 32 nc lv not connected 47 37 31 37 31 sc1_out_l out lv scart 1 output, left 48 36 30 36 30 sc1_out_r out lv scart 1 output, right 49 35 29 35 29 vref1 x reference ground 1 high voltage part 50 34 28 34 28 nc lv not connected 51 33 27 33 ? nc lv not connected 52 ? ? 32 ? nc lv not connected
msp 34x5d preliminary data sheet 51 micronas short description connection (if not used) type pin name pin no. short description connection (if not used) pmqfp 44-pin pqfp 80-pin psdip 52-pin psdip 64-pin plcc 68-pin 53 32 ? 31 ? nc lv not connected 54 31 26 30 ? nc lv not connected 55 30 ? 29 ? nc lv not connected 56 29 25 28 27 dacm_l out lv loudspeaker out, left 57 28 24 27 26 dacm_r out lv loudspeaker out, right 58 27 23 26 25 vref2 x reference ground 2 high voltage part 59 26 22 25 24 nc lv not connected 60 25 21 24 23 nc lv not connected ? ? ? 23 ? nc lv not connected ? ? ? 22 ? nc lv not connected 61 24 20 21 22 resetq in x power-on-reset 62 23 ? 20 ? nc lv not connected 63 22 ? 19 ? nc lv not connected 64 21 19 18 ? nc lv not connected 65 20 18 17 21 i2s_da_in2 in lv i 2 s2 data input 66 19 17 16 ? dvss x digital ground ? ? ? 15 ? dvss x digital ground ? ? ? 14 20 dvss x digital ground 67 18 16 13 19 dvsup x digital power supply +5 v ? ? ? 12 ? dvsup x digital power supply +5 v ? ? ? 11 ? dvsup x digital power supply +5 v 68 17 15 10 18 tp_co out lv test pin (use this pin to define the capacitor size at crystal oscillator. ) 1 ) note: for pqfp80 package only and for a2 version only, the following pin-allocation is valid: pin 74 = tp, pin 52 = asg2
msp 34x5d preliminary data sheet 52 micronas 8.3. pin configurations 7 8 9 10 11 12 13 14 15 16 17 29 30 31 32 33 34 35 36 37 38 39 18 19 20 21 22 23 24 25 26 27 28 654321 44 43 42 41 40 68 67 66 65 64 63 62 61 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 tp nc tp i2s_da_in1 i2s_da_out i2s_ws i2c_da i2s_cl i2c_cl nc standbyq adr_sel d_ctr_out0 d_ctr_out1 nc nc nc nc tp xtal_out xtal_in testen nc ana_in ? ana_in1+ avsup avss mono_in vreftop sc1_in_r sc1_in_l asg1 sc2_in_r sc2_in_l nc nc nc nc nc nc nc agndc ahvss capl_m ahvsup nc sc1_out_l sc1_out_r vref1 nc nc nc nc nc nc dacm_l dacm_r vref2 nc nc resetq nc nc nc i2s_da_in2 dvss dvsup tp_co fig. 8 ? 6: 68-pin plcc package msp 34x5d
msp 34x5d preliminary data sheet 53 micronas fig. 8 ? 7: 64-pin psdip package 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 nc d_ctr_out0 adr_sel standbyq nc i2c_cl i2c_da i2s_cl i2s_ws i2s_da_in1 tp tp tp_co dvsup dvss i2s_da_in2 nc testen ana_in1+ avsup avss vreftop sc1_in_l sc1_in_r i2s_da_out nc nc nc sc2_in_r xtal_in xtal_out mono_in d_ctr_out1 sc2_in_l asg1 ana_in ? nc 21 22 23 24 25 26 27 28 29 30 31 32 nc nc vref2 dacm_r dacm_l resetq 33 34 35 36 37 38 39 40 41 42 43 44 ahvss nc sc1_out_l sc1_out_r nc nc agndc nc vref1 ahvsup capl_m nc nc nc nc nc nc nc nc nc tp msp 34x5d 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 d_ctr_out0 adr_sel standbyq i2c_cl i2c_da i2s_cl i2s_ws i2s_da_in1 tp tp tp_co dvsup dvss i2s_da_in2 testen ana_in1+ avsup avss vreftop sc1_in_l sc1_in_r i2s_da_out nc nc sc2_in_r xtal_in xtal_out mono_in d_ctr_out1 sc2_in_l ana_in ? nc 21 22 23 24 25 26 nc vref2 dacm_r dacm_l nc nc 27 28 29 30 31 32 ahvss nc sc1_out_l sc1_out_r nc nc agndc vref1 ahvsup capl_m fig. 8 ? 8: 52-pin psdip package nc resetq nc tp msp 34x5d
msp 34x5d preliminary data sheet 54 micronas 65 avsup 66 avsup 67 ana_in1+ 68 ana_in ? 69 nc 70 testen 71 xtal_in 72 xtal_out 73 tp 74 nc 75 nc 76 nc 77 d_ctr_out1 78 d_ctr_out0 79 adr_sel 80 standbyq capl_m 40 ahvsup 39 nc 38 sc1_out_l 37 sc1_out_r 36 vref1 35 nc 34 nc 33 nc 32 nc 31 nc 30 nc 29 dacm_l 28 dacm_r 27 vref2 26 nc 25 nc avss avss mono_in nc vreftop sc1_in_r sc1_in_l asg1 nc sc2_in_r sc2_in_l nc nc nc nc nc nc nc agndc ahvss ahvss nc nc i2c_cl i2c_da i2s_cl i2s_ws i2s_da_out i2s_da_in1 tp tp tp_co nc dvsup dvsup dvsup dvss dvss dvss i2s_da_in2 nc nc nc resetq nc nc nc 123456789101112131415161718192021222324 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 msp 34x5d fig. 8 ? 9: 80-pin pqfp package
msp 34x5d preliminary data sheet 55 micronas 34 capl_m 35 ahvss 36 agndc 37 sc2_in_l 38 sc2_in_r 39 asg1 40 sc1_in_l 41 sc1_in_r 42 vreftop 43 mono_in 44 avss resetq 22 i2s_da_in2 21 dvss 20 dvsup 19 tp_co 18 i2s_da_in1 17 i2s_da_out 16 i2s_ws 15 i2s_cl 14 i2c_da 13 i2c_cl 12 nc sc1_out_l sc1_out_r vref1 nc ahvsup dacm_l dacm_r vref2 nc nc ana_in+ ana_in ? testen xtal_in xtal_out avsup tp d_ctr_out1 d_ctr_out0 adr_sel standbyq 1234567891011 33 32 31 30 29 28 27 26 25 24 23 msp 34x5d fig. 8 ? 10: 44-pin pmqfp package 8.4. pin circuits (pin numbers refer to plcc68 package) fig. 8 ? 11: input pins 4, 11, 12, 61, and 65 (i2s_da_in1, standbyq, adr_sel, resetq, and i2s_da_in2) p dvsup n gnd fig. 8 ? 12: output pins 5, 13, 14, and 68 (i2s_da_out, d_ctr_out0/1, tp_co) p dvsup n gnd fig. 8 ? 13: input/output pins 6 and 7 (i2s_ws, i2s_cl) fig. 8 ? 14: input/output pins 8 and 9 (i2c_da, i2c_cl) n gnd
msp 34x5d preliminary data sheet 56 micronas fig. 8 ? 15: input/output pins 20 and 21 (xtal_out/in) p n 500 k 3 ? 30 pf 3 ? 30 pf fig. 8 ? 16: input pins 24, 25, and 29 (ana_in ? , ana_in1+, vreftop) d a ana_in1+ ana_in ? vreftop fig. 8 ? 17: input pin 28 (mono_in) 24 k ? 18: input pins 30, 31, 33, and 34 (sc1 ? 2_in_l/r) 40 k ? 19: pin 42 (agndc) 125 k ? 20: capacitor pin 44 (capl_m) 0...2 v fig. 8 ? 21: output pins 47, 48 (sc1_out_l/r) 300 40 pf 80 k ? 22: output pins 56, 57 (dacm_l/r) 3.3 k 0...1.2 ma ahvsup
msp 34x5d preliminary data sheet 57 micronas 8.5. electrical characteristics 8.5.1. absolute maximum ratings symbol parameter pin name min. max. unit t a ambient operating temperature ? 0 70 1) ? ? 40 125 ? 0.3 9.0 v v sup2 second supply voltage dvsup ? 0.3 6.0 v v sup3 third supply voltage avsup ? 0.3 6.0 v dv sup23 voltage between avsup and dvsup avsup, dvsup ? 0.5 0.5 v p tot package power dissipation plcc68 without heat spreader psdip64 without heat spreader psdip52 without heat spreader pmqfp44 without heat spreader ahvsup, dvsup, avsup 1200 1300 1200 910 1) mw v idig input voltage, all digital inputs ? 0.3 v sup2 +0.3 v i idig input current, all digital pins ? ? 20 +20 ma 2) v iana input voltage, all analog inputs scn_in_s, 3) mono_in ? 0.3 v sup1 +0.3 v i iana input current, all analog inputs scn_in_s, 3) mono_in ? 5 +5 ma 2) i oana output current, all scart outputs sc1_out_s 4) , 5) 4) , 5) i oana output current, all analog outputs except scart outputs dacm_s 3) 4) 4) i cana output current, other pins connected to capacitors capl_m agndc 4) 4) 1) for pmqfp44 package, max. ambient operating temperature is 65 ? n ? means ? 1 ? or ? 2 ? , ? s ? means ? l ? or ? r ? 4) the analog outputs are short circuit proof with respect to first supply voltage and ground. 5) total chip power dissipation must not exceed absolute maximum rating. stresses beyond those listed in the ? absolute maximum ratings ? may cause permanent damage to the device. this is a stress rating only. functional operation of the device at these or any other conditions beyond those indicated in the ? recommended operating conditions/characteristics ? of this specification is not implied. exposure to absolute maxi- mum ratings conditions for extended periods may affect device reliability.
msp 34x5d preliminary data sheet 58 micronas 8.5.2. recommended operating conditions (at t a = 0 to 70 (see also fig. 5?3 on page 19) 0.45 0.55 dvsup v digil digital input low voltage adr_sel 0.2 v sup2 v digih digital input high voltage 0.8 v sup2 v digil digital input low voltage standbyq 0.2 v sup2 v digih digital input high voltage msp 34x5d version a1, a2 msp 34x5d version b3 and later 0.8 0.5 v sup2 v sup2 t stbyq1 standbyq setup time before turn-off of second supply voltage standbyq, dvsup 1
msp 34x5d preliminary data sheet 59 micronas unit max. typ. min. pin name parameter symbol i 2 s-bus recommendations v i2sih i 2 s-data input low voltage msp 34x5d version a1, a2 msp 34x5d version b3 and later i2s_da_in1/2 0.25 0.2 v sup2 v sup2 v i2sil i 2 s-data input high voltage msp 34x5d version a1, a2 msp 34x5d version b3 and later 0.75 0.5 v sup2 v sup2 t i2s1 i 2 s-data input setup time before rising edge of clock i2s_da_in1/2 i2s_cl 20 ns t i2s2 i 2 s-data input hold time after falling edge of clock 0 ns f i2scl i 2 s-clock input frequency when msp in i 2 s-slave mode i2s_cl 1.024 mhz r i2scl i 2 s-clock input ratio when msp in i 2 s-slave mode 0.9 1.1 f i2sws i 2 s-word strobe input frequency when msp in i 2 s-slave mode i2s_ws 32.0 khz v i2sidl i 2 s-input low voltage when msp in i 2 s-slave mode msp 34x5d version a1, a2 msp 34x5d version b3 and later i2s_cl i2s_ws 0.25 0.2 v sup2 v sup2 v i2sidh i 2 s-input high voltage when msp in i 2 s-slave mode msp 34x5d version a1, a2 msp 34x5d version b3 and later 0.75 0.5 v sup2 v sup2 t i2sws1 i 2 s-word strobe input setup time before rising edge of clock when msp in i 2 s-slave mode 60 ns t i2sws2 i 2 s-word strobe input hold time after falling edge of clock when msp in i 2 s-slave mode 0 ns
msp 34x5d preliminary data sheet 60 micronas unit max. typ. min. pin name parameter symbol general crystal recommendations f p crystal parallel resonance fre- quency at 12 pf load capacitance 18.432 mhz r r crystal series resistance 8 25 ? ? 20 +20 ppm d tem frequency variation vs temp. ? 20 +20 ppm c 1 motional (dynamic) capacitance 19 24 ff f cl required open loop clock frequency (t amb = 25 ? 30 +30 ppm d tem frequency variation vs temp. ? 30 +30 ppm c 1 motional (dynamic) capacitance 15 ff f cl required open loop clock frequency (t amb = 25 ? 100 +100 ppm d tem frequency variation versus temperature ? 50 +50 ppm amplitude recommendation for operation with external clock input (c load after reset = 22 pf) v xca external clock amplitude xtal_in 0.7 v pp 1) external capacitors at each crystal pin to ground are required. they are necessary to tune the open-loop fre- quency of the internal pll and to stabilize the frequency in closed-loop operation. due to different layouts, the accurate capacitor size should be determined with the customer pcb . the sug- gested values (1.5...3.3 pf) are figures based on experience and should serve as ? start value ? . to define the capacitor size, reset the msp without transmitting any further i 2 c telegrams. set mode_reg 0083 hex bit [14]=1. measure the frequency at pin tp_co (see pin description in table on page 51). change the capacitor size until the free running frequency at pin tp_co matches 6.144000 mhz (=18.432000 mhz / 3) as closely as possible. the higher the capacity, the lower the resulting clock frequency.
msp 34x5d preliminary data sheet 61 micronas unit max. typ. min. pin name parameter symbol analog input and output recommendations c agndc agndc-filter-capacitor agndc ? 20% 3.3 ? 20% 100 nf c insc dc-decoupling capacitor in front of scart inputs scn_in_s 1) ? 20% 330 +20% nf v insc scart input level 2.0 v rms v inmono input level, mono input mono_in 2.0 v rms r lsc scart load resistance sc1_out_s 1) 10 k ? ? 10% 1 +10% nf recommendations for analog sound if input signal c vreftop vreftop-filter-capacitor vreftop ? 20% 10 ? 20% 100 nf f if_fm analog input frequency range 0 9 mhz v if_fm analog input range fm/nicam 0.1 0.8 3 vpp v if_am analog input range am/nicam 0.1 0.45 0.8 vpp r fmni ratio: nicam carrier/fm carrier (unmodulated carriers) bg: i: ? 20 ? 23 ? 7 ? 10 0 0 db db r amni ratio: nicam carrier/am carrier (unmodulated carriers) ? 25 ? 11 0 db db r fm ratio: fm-main/fm-sub satellite 7 db r fm1/fm2 ratio: fm1/fm2 german fm-system ana_in1+, ana_in ? 7 db r fc ratio: main fm carrier/ color carrier 15 ? ? db r fv ratio: main fm carrier/ luma components 15 ? ? db pr if passband ripple ? ? ? db fm max maximum fm-deviation (apprx.) normal mode high deviation mode ? n ? means ? 1 ? or ? 2 ? , ? s ? means ? l ? or ? r ?
msp 34x5d preliminary data sheet 62 micronas 8.5.3. characteristics at t a = 0 to 70 ? 30 db ahvsup 9.6 6.3 17.1 11.2 24.6 16.1 ma ma i sup1s first supply current (standby mode) at t j = 27 ? 1 ma i 2 c-bus v i2col i 2 c-data output low voltage i2c_da 0.4 v i i2col = 3 ma i i2coh i 2 c-data output high current 1.0
msp 34x5d preliminary data sheet 63 micronas test conditions unit max. typ. min. pin name parameter symbol i 2 s-bus v i2sol i 2 s output low voltage i2s_ws i2s cl 0.4 v i i2sol = 1 ma v i2soh i 2 s output high voltage i2s _ cl i2s_da_out 4.0 v i i2soh = ? 1 ma f i2sws i 2 s word strobe output frequency i2s_ws 32.0 khz nicam-pll closed f i2scl i 2 s clock output frequency i2s_cl 1024 khz t i2s1/i2s2 i 2 s clock high/low ratio 0.9 1 1.1 t i2s3 i 2 s data setup time before rising edge of clock i2s_cl i2s_da_out 200 ns c l = 30 pf t i2s4 i 2 s data hold time after falling edge of clock 180 ns t i2s5 i 2 s word strobe setup time before rising edge of clock i2s_cl i2s_ws 200 ns t i2s6 i 2 s word strobe hold time after falling edge of clock 180 ns analog ground v agndc0 agndc open circuit voltage agndc 3.67 3.77 3.87 v r load ? ? ? ? ? ? ? 70 +70 mv a sctosc gain from analog input to scart output scn_in_s 1) mono_in ? 1.0 +0.5 db f signal = 1 khz f rsctosc frequency response from analog input to scart output , bandwidth: 0 to 20000 hz ? 0.5 +0.5 db with resp. to 1 khz v outsc effective signal level at scart- output during full-scale digital in- put signal from dsp sc1_out_s 1) 1.8 1.9 2.0 v rms f signal = 1 khz 1) ? n ? means ? 1 ? , or ? 2 ? ; ? s ? means ? l ? or ? r ?
msp 34x5d preliminary data sheet 64 micronas test conditions unit max. typ. min. pin name parameter symbol main outputs r outma main output resistance at t j = 27 ? ? ? 30 db 1.8 2.04 61 2.28 v mv v outma effective signal level at main-out- put during full-scale digital input signal from dsp for analog vol- ume at 0 db 1.23 1.37 1.51 v rms f signal = 1 khz analog performance snr signal-to-noise ratio from analog input to scart output mono_in, scn_in_s 1) ? 20 db, f sig = 1 khz, equally weighted 20 hz ... 20 khz thd total harmonic distortion from analog input to scart output mono_in, scn_in_s 1 ) ? 3 dbr, f sig = 1 khz, equally weighted 20 hz ... 20 khz xtalk crosstalk attenuation between left and right channel within scart input/output pair (l ? 3 db, f sig = 1 khz, unused analog inputs connected to ground b yz<1k ? ? ? 6 db, 1 khz, rms unweighted 0 to 15 khz, nicam_prescale = 7fh, vol = 9 db ? n ? means ? 1 ? or ? 2 ? ; ? s ? means ? l ? or ? r ? spm: short programming mode
msp 34x5d preliminary data sheet 65 micronas test conditions unit max. typ. min. pin name parameter symbol thd nicam total harmonic distortion and noise of nicam baseband signal on main/scart outputs dacm_s 1 ), sc1_out_s 1 ) 0.1 % 2.12 khz, modulator input level = 0 dbref spm = 8 ber ni nicam: bit error rate ? 1 10 ? 7 fm and nicam, norm conditions s/n am signal-to-noise ratio of am base- band signal on main/scart out- puts dacm_s 1 ), sc1_out_s 1 ) 48 db sif input range: 0.1 ? 0.8 vpp; am= 70%, 1 khz, rms unweighted (s/n); 0 to 15 khz, fm/am prescale = 3c h thd am total harmonic distortion and noise of am demodulated signal on main/scart outputs dacm_s 1 ), sc1_out_s 1 ) 0.3 % fm/am - prescale = 3c hex , vol = 0 db ? 1.5 10.5 2 14.1 2.5 17.6 k ? ? ? 1.3 1.5 1.7 v xtalk if crosstalk attenuation ana_in1+, ana in 40 db f signal = 1 mhz in p ut level = 2 dbr bw if 3 db bandwidth ana _ in ? 10 mhz input level = ? 2 dbr agc agc step width 0.85 db dv fmout tolerance of output voltage of fm demodulated signal dacm_s 1 ), sc1_out_s 1 ) ? 1.5 +1.5 db 1 fm-carrier, 50 ? 1.5 +1.5 db 2.12 khz, modulator input level = 0 dbref fr fm fm frequency response on main/ scart outputs, bandwidth 20 to 15000 hz dacm_s 1 ), sc1_out_s 1 ) ? 1.0 +1.0 db 1 fm-carrier 5.5 mhz, 50 ? 14.6 dbref; rms fr nicam nicam frequency response on main/scart outputs, bandwidth 20 to 15000 hz dacm_s 1 ), sc1_out_s 1 ) ? 1.0 +1.0 db modulator input level = ? 12 db dbref; rms sep fm fm channel separation (stereo) dacm_s 1 ), sc1_out_s 1 ) 50 db 2 fm-carriers 5.5/5.74 mhz, 50 ? n ? means ? 1 ? or ? 2 ? ; ? s ? means ? l ? or ? r ? spm: short programming mode
msp 34x5d preliminary data sheet 66 micronas 9. application circuit dacm_l (29) 56 dacm_r (28) 57 sc1_out_l (37) 47 sc1_out_r (36) 48 testen (61) 22 32 (51) asg1 8 (10) i2c_da 9 (9) i2c_cl 12 (6) adr_sel 31 (52) sc1_in_l msp 34x5d 28 (55) mono_in 11 (7) standbyq 30 (53) sc1_in_r 33 (50) sc2_in_r 34 (49) sc2_in_l 45 (39) ahvsup 43 (41) ahvss 26 (57) avsup 67 (18) dvsup 66 (19) dvss 61 (24) resetq 27 (56) avss 49 (35) vref1 58 (27) vref2 signal gnd if 1 in 18.432 mhz main +8.0 v 1 ? + 10 ? ? ? (59) 24 xtal_in (62) 21 xtal_out (63) 20 c s. section 8.5.2. 6 (12) i2s_ws 7 (11) i2s_cl 4 (14) i2s_da_in1 65 (20) i2s_da_in2 5 (13) i2s_da_out d_ctr_out1 (4) 14 d_ctr_out0 (5) 13 note: pin numbers refer to the plcc68 package, numbers in brackets refer to the psdip64 package.
msp 34x5d preliminary data sheet 67 micronas 10. appendix a: msp 34x5d version history a1 first hardware release msp 3415d a2 second hardware release msp 3405d and msp 3415d b3 ? i 2 s bus supported with version b3 and later versions ? digital input specification changed with version b3 and later versions (see section ... ) ? max. analog high supply voltage ahvsup 8.7 v
msp 34x5d preliminary data sheet 68 micronas 11. data sheet history 1. preliminary data sheet: ? msp 34x5d multistandard sound processors ? , aug. 5, 1998, 6251-475-1pd. first release of the preliminary data sheet. 2. preliminary data sheet: ? msp 34x5d multistandard sound processors ? , oct. 14, 1999, 6251-475-2pd. second release of the preliminary data sheet. major changes: ? specification for version b3 added (see appendix a: version history) ? specification for i 2 s interface added ? section 8.1.: outline dimensions for all packages changed micronas gmbh hans-bunte-strasse 19 d-79108 freiburg (germany) p.o. box 840 d-79008 freiburg (germany) tel. +49-761-517-0 fax +49-761-517-2174 e-mail: docservice@micronas.com internet: www.micronas.com printed in germany order no. 6251-475-2pd all information and data contained in this data sheet are without any commitment, are not to be considered as an offer for conclusion of a contract, nor shall they be construed as to create any liability. any new issue of this data sheet invalidates previous issues. product availability and delivery are exclusively subject to our respective order confirma- tion form; the same applies to orders based on development samples delivered. by this publication, micronas gmbh does not assume re- sponsibility for patent infringements or other rights of third parties which may result from its use. further, micronas gmbh reserves the right to revise this publication and to make changes to its content, at any time, without obligation to notify any person or entity of such revisions or changes. no part of this publication may be reproduced, photocopied, stored on a retrieval system, or transmitted without the express written consent of micronas gmbh.
micronas page 1 of 1 subject: data sheet concerned: supplement: edition: preliminary data sheet supplement msp 34xxd family compatibility differences: the msp-family (msp 3410d, msp 3400d, msp 3415d, msp 3405d, msp 3417d, msp 3407d) is currently avail- able in different technologies (0.8 , 0.5 , and 0.45 ). the specific differences of the various implementations are listed in the attached table. compatibility differences all msp 34xxd data sheets: 6251-482-2pd, 6251-475-2pd, 6251-486-2pd no. 3/ 6251-526-3pds oct. 11, 2000 msp 34xxd
micronas compatibility differences between 0.5/0.45 and 0.8 mspd devices b4 a2 a1 0.8 0.5 0.45 0.8 0.5 0.45 0.8 0.5 0.45 67, 6b, 6g 8c and 94 g1, g4 h1, h3 6c, 6d 8d g2, g5 h2, h4 6e, 6f 8f g3, g6, h5 feature documented in datasheet reference general hardware power consumption datasheet 910 mw 640 mw 600 mw 910 mw 640 mw 600 mw 910 mw 640 mw 600 mw total electromagnetic radiation (emr) - - - v agndc0 typical datasheet 3.73 v 3.73 v 3.73 v dc vreftop typical datasheet 2.6 v 2.6 v 2.6 v maximum v sup1 datasheet 8.4 v 8.4 v 8.4 v digital input pin characteristics (i2s_in1/2, i2s_ws/cl, standbyq) datasheet - - - demodulator carrier mute - - - am-frequency response - - - automatic standard detection - - - baseband processing j17-deemphasis for fm -input channels datasheet supplement available available available i 2 s-bus datasheet not available frequency response of 50/75s deemphasis - - - dc_level (dsp-reg.: 1b hex /1c hex ) - - - technology mask iteration code msp 3407d, msp 3417d edit jan. 2000 2.66 v 2.66 v 3.77 v 3.77 v less due to less power consumption b3 b2 msp 3417d / msp 3407d msp-type version code msp 3415d / msp 3405d msp 3410d / msp 3400d more flat more flat more flat level increased by appr. 15% 1*) level increased by appr. 15% 1*) level increased by appr. 15% 1*) not available (75s instead of j17) not available (75s instead of j17) available available not available more flat faster, more stable and with mute- function faster, more stable and with mute- function faster, more stable and with mute- function modified specifications (see datasheet) slightly slower, but more stable: 64ms mute, 500 ms demute slightly slower, but more stable: 64ms mute, 500 ms demute slightly slower, but more stable: 64ms mute, 500 ms demute modified specifications (see datasheet) modified specifications (see datasheet) less due to less power consumption 8.7 v 8.7 v less due to less power consumption 3.77 v 2.66 v 8.7 v msp 3400d, msp 3410d edit. may 1999 c5 msp 3405d, msp 3415d edit oct. 1999 more flat more flat not available (75s instead of j17) date: 11.10.00 page 1 of 2 pages
micronas b4 a2 a1 0.8 0.5 0.45 0.8 0.5 0.45 0.8 0.5 0.45 67, 6b, 6g 8c and 94 g1, g4 h1, h3 6c, 6d 8d g2, g5 h2, h4 6e, 6f 8f g3, g6, h5 feature documented in technology mask iteration code b3 b2 msp 3417d / msp 3407d msp-type version code msp 3415d / msp 3405d msp 3410d / msp 3400d c5 d/a-outputs s/n-ratio - - - pinning scart2_out pin datasheet connected dac-headphone pins datasheet connected audio_clock_out datasheet connected the following pins refer to pqfp80: pin 52 datasheet asg2 asg2 asg2 asg2 pin 32 datasheet asg3 asg3 pin 14 datasheet not connected dvss dvss not connected dvss dvss pin 16 datasheet dvss not connected not connected dvss not connected not connected *1) in spite of increased dc-level controller-algorithms for automatic sat-carrier detection should run properly not connected (s. datasheet p.59) improved msp 34x7d not available in 80-pqfp msp 34x7d not available in 80-pqfp not connected not connected connected not connected improved improved not connected (s. datasheet p.51) not connected connected connected not connected (s. datasheet p.51) not connected msp 34x7d not available in 80-pqfp msp 34x7d not available in 80-pqfp not connected (s. datasheet p.51) date: 11.10.00 page 2 of 2 pages

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